summaryrefslogtreecommitdiff
path: root/configs
Commit message (Collapse)AuthorAgeLines
...
| * imx: mx6ul_14x14_evk add basic board supportPeng Fan2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Boot Log: U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device Reset cause: POR Board: MX6UL 14x14 EVK I2C: ready DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * sf: kconfig: add kconfig options for spi flashesNikita Kiryanov2015-08-02-0/+8
| | | | | | | | | | | | | | | | | | | | Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig. Cc: Jagan Teki <jteki@openedev.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * usb: kconfig: usb keyboard kconfigNikita Kiryanov2015-08-02-0/+2
| | | | | | | | | | | | | | | | | | | | Add Kconfig options for USB keyboard and use them for cm-fx6. Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: usb: kconfig: add USB_EHCI_MX6 kconfig optionNikita Kiryanov2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb config to defconfig. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: move cm-fx6 target under ARCH_MX6Nikita Kiryanov2015-08-02-0/+1
| | | | | | | | | | | | | | | | | | | | cm-fx6 is an MX6 based board, and the menuconfig hierarchy should reflect that. Make TARGET_CM_FX6 dependant on ARCH_MX6. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: move CMD configs to defconfigNikita Kiryanov2015-08-02-0/+5
| | | | | | | | | | | | | | | | | | | | Move CONFIG_CMD_* options that can be selected in menuconfig to cm-fx6 defconfig. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board supportPeng Fan2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add DDR script for mx6qpsabreauto board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Boot Log: U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800) CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Board: MX6Q-Sabreauto revA I2C: ready DRAM: 2 GiB PMIC: PFUZE100 ID=0x10 Flash: 32 MiB NAND: 0 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment No panel detected: default to HDMI Display: HDMI (1024x768) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Note: In this patch, we still add a new config mx6qpsabreauto_config, since SPL is not supported now, and IMX_CONFIG is needed at build time, so add this config. Future, when SPL is converted, this config can be removed. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add thermal supportOtavio Salvador2015-07-26-0/+3
| | | | | | | | | | | | | | | | Add thermal support so that we can see the following message on boot: CPU: Industrial temperature grade (-40C to 105C) at 33C Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * arm: mx6: tqma6: Add WRU-IV baseboard for the TQMa6 SoMStefan Roese2015-07-26-0/+12
| | | | | | | | | | | | | | | | | | This patch adds support for the "OHB System AG" baseboard with is equipped with the TQMa6S SoM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-07-31-0/+71
|\ \
| * | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040Aneesh Bansal2015-07-31-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal2015-07-31-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/T104xD4: Add Secure boot support for T104xD4RDB platformsgaurav rana2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | defconfig files are added and SFP version for these platforms is updated. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/T104xD4RDB: Add T104xD4RDB boards supportPriyanka Jain2015-07-28-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-07-29-0/+16
|\ \ \
| * | | T210: Add support for 64-bit T210-based P2571 boardTom Warren2015-07-28-0/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with a 32-bit AVP loader). Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | x86: qemu: Enable writing MP tableBin Meng2015-07-28-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable writing MP table for QEMU boads (i440fx and q35). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-0/+1
| | | | | | | | | | | | | | | | | | Move to driver model pci for Intel queensbay/crownbay. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add a RTC node in the device tree to enable DM RTC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> (Squashed in 'x86: Fix RTC build error on ivybridge')
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-2/+16
|\ \ \
| * | | ARM: zynq: Add support for zc770-xm011Michal Simek2015-07-28-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add xm011 DTS file and related configs and configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfigSiva Durga Prasad Paladugu2015-07-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_SYS_TEXT_BASE of ZynqMP_ep to its respective defconfig Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | am3517_evm: add FIT supportYegor Yefremov2015-07-27-0/+1
|/ / | | | | | | | | | | | | | | Enable DTS support (CONFIG_OF_LIBFDT) and select CONFIG_FIT in defconfig. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | sunxi: Enable both ehci and otg in host mode on various boardsHans de Goede2015-07-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | Now that the device-model port of the musb mode makes it possible, enable both the ehci and otg in host mode on boards where the musb is wired up in host only mode, either via an usb-a receptacle or via an usb <-> sata converter. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: ga10h: Enable both otg and regular usb host controllersHans de Goede2015-07-25-0/+2
| | | | | | | | | | | | | | This allows using devices plugged into both ports of the tablet. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: musb: Add id pin supportHans de Goede2015-07-25-0/+3
| | | | | | | | | | | | | | | | | | | | When in host mode check if there is a host cable inserted into the otg port by checking the id pin. If there is no host cable return an error to make usb_lowlevel_init() exit early, rather then waiting for 1 second for a device which will never show up. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Update selects in arch/arm/Kconfig for DM conversionsTom Rini2015-07-25-250/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | With certain features being convert to DM now we want sunxi to default to having DM enabled for ETH/SERIAL and USB in some cases. Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Rini <trini@konsulko.com> [hdegoede@redhat.com: Also select CONFIG_USB for all sunxi builds] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-uniphierTom Rini2015-07-23-6/+28
|\ \
| * | ARM: UniPhier: add PH1-sLD3 SoC supportMasahiro Yamada2015-07-23-0/+28
| | | | | | | | | | | | | | | | | | | | | The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: disable CONFIG_FITMasahiro Yamada2015-07-23-6/+0
| | | | | | | | | | | | | | | | | | | | | To use FIT boot, we have to describe Image Tree Source in addition. So, it is not intended for beginners. Disable it by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge git://git.denx.de/u-boot-marvellTom Rini2015-07-23-0/+1
|\ \ \
| * | | arm: mvebu: db-88f6820: Add SPL support with DDR init codeStefan Roese2015-07-23-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL support for the Marvell DB-88F6820-GP board. With this change, the bin_hdr from the original Marvell U-boot is not needed any more on this board. The sources from bin_hdr (SERDES/PHY and DDR setup) are now integrated in mainline U-Boot. And this patch enables them for this board. Signed-off-by: Stefan Roese <sr@denx.de>
* | | dm: test: Add a test for the system controller uclassSimon Glass2015-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Add a test to confirm that we can access system controllers and find their driver data. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: test: Add a test for the LED uclassSimon Glass2015-07-21-0/+2
| | | | | | | | | | | | | | | | | | Add a test to confirm that we can adjust LEDs using the led_gpio driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: test: Add a test for the mmc uclassSimon Glass2015-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Add a test to confirm that we can probe this device. Since there is no MMC stack support in sandbox at present, this is as far as the test goes. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: test: Add a test for the ram uclassSimon Glass2015-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Add a test to confirm that we can probe this device and get information on the available RAM. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Use the reset driver to handle resetSimon Glass2015-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Move sandbox over to use the reset uclass for reset, instead of a direct call to do_reset(). This allows us to add tests. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: test: Add tests for the clk uclassSimon Glass2015-07-21-0/+1
| | | | | | | | | | | | | | | | | | Add tests of each API call using a sandbox clock device. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Enable dhry commandSimon Glass2015-07-21-0/+1
|/ / | | | | | | | | | | Provide access to the dhrystone benchmark command. Signed-off-by: Simon Glass <sjg@chromium.org>
* | armv8/ls2085a/defconfig: Enable FSL_DSPI, OF_CONTROL and DM supportHaikun.Wang@freescale.com2015-07-20-0/+14
|/ | | | | | | | | Freescale DSPI driver has been converted to Driver Model. The new driver depends on OF_CONTROL, DM, DM_SPI. This patch enable FSL_DSPI and its dependence configure options. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-07-15-0/+13
|\
| * x86: Adjust config option order in defconfig for Crown Bay and MinnowmaxBin Meng2015-07-14-6/+6
| | | | | | | | | | | | | | | | Update crownbay_defconfig and minnowmax_defconfig with 'savedefconfig' result so that the config option order matches Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-14-0/+1
| | | | | | | | | | | | | | | | | | Adjust minnowmax to use driver model for PCI. This requires adding a device tree node to specify the ranges, removing the board-specific PCI code and ensuring that the host bridge is configured. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: crownbay: Enable graphics supportBin Meng2015-07-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | Enable graphics support on Intel Crown Bay board With the help of vgabios for Intel TunnelCreek IGD. Tested with an external LVDS panel connected to X4 connector and SDVO adapter connected to X9 connector on the board. Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Move VGA option rom macros to KconfigBin Meng2015-07-14-0/+3
| | | | | | | | | | | | | | | | | | | | Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: crownbay: Enable writing MP tableBin Meng2015-07-14-0/+1
| | | | | | | | | | | | | | Enable writing MP table for Intel Crown Bay board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+1
| | | | | | | | | | | | | | Add a RTC node in the device tree to enable DM RTC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Intel Crown Bay board has a TunnelCreek processor which supports hyper-threading. Add /cpus node in the crownbay.dts and enable the MP initialization. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (modified to remove error: overriding the value of OF_CONTROL. Old value: "y", new value: "y")
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-07-14-1/+1
|\ \ | |/ |/|
generated by cgit v1.1 at 2024-11-08 06:33:00 +0000