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* arm: socfpga: config: Move SPL GD and malloc to RAMMarek Vasut2015-08-08-0/+9
| | | | | | | | | | | Now that the SPL structure is organised such that it matches the U-Boot's SPL design, it is possible to use the option of relocating GD to RAM. And since we have GD in RAM, move malloc area to RAM as well. We point the malloc base pointer 1 MiB past U-Boot's load address. We use simple malloc for SPL because it is 3kiB smaller in terms of code size than regular malloc which was used thus far. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: misc: Probe ethernet GMAC from OFMarek Vasut2015-08-08-0/+2
| | | | | | | | | The GMAC can now be probed from OF, so enable DM ethernet and remove the old ad-hoc designware_initialize() invocation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* arm: socfpga: spl: Add support for booting from QSPIMarek Vasut2015-08-08-0/+15
| | | | | | | Add code and configuration options to support booting from QSPI NOR. Enable support for booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add support for booting from SD/MMCMarek Vasut2015-08-08-1/+6
| | | | | | | | | | Add code and configuration options to support booting from RAW SD/MMC card as well as for ext4/vfat filesystems. Enable support for booting from SD/MMC card, but don't enable the filesystem support just yet to retain compatibility with old SoCFPGA card format. Signed-off-by: Marek Vasut <marex@denx.de>
* Merge git://git.denx.de/u-boot-dmTom Rini2015-08-06-0/+133
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| * x86: Enable debug UART for MinnowmaxSimon Glass2015-08-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the debug UART and emit a single 'a' early in the init sequence to show that it is working. Unfortunately the debug UART implementation needs a stack to work. I cannot seem to remove this limitation as the absolute 'jmp %eax' instruction goes off into the weeds. So this means that the character output cannot be any earlier than car_init_ret, where memory is available for a stack. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * sandbox: Enable devres subsystemSimon Glass2015-08-06-0/+1
| | | | | | | | | | | | | | | | This should be used for sandbox. We can convert at least one driver to use it, but in the meantime, enable the feature so that the code is build-tested. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Make regmap and syscon optionalSimon Glass2015-08-06-0/+1
| | | | | | | | | | | | | | | | Not all boards use garbage collection in their link step, so we should avoid adding options that rely on this for prevention of code bloat. Add separate Kconfig options for syscon and regmap uclasses. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: Add support for springSimon Glass2015-08-05-0/+42
| | | | | | | | | | | | | | | | | | | | Spring is the first ARM-based HP Chromebook 11. It is similar to snow and it uses the same Samsung Exynos5250 chip. But has some unusual features. Mainline support for it has lagged snow (both in kernel and U-Boot). Now that the exynos5 code is common we can support spring just by adding a device tree and a few lines of configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
| * exynos: Enable new features for exynos5 boardsSimon Glass2015-08-05-0/+81
| | | | | | | | | | | | | | Enable PMICs, regulators and the like so that new drivers will be made available. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: cros_ec: Convert the I2C tunnel code to use driver modelSimon Glass2015-08-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* | ARM: tegra: Add p2371-0000 boardStephen Warren2015-08-06-0/+17
| | | | | | | | | | | | | | | | | | | | | | P2371-0000 is a P2581 or P2530 CPU board married to a P2595 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA, a GPIO expansion header, and an analog audio jack. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: Add e2220-1170 boardStephen Warren2015-08-06-0/+17
| | | | | | | | | | | | | | | | | | E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various expansion modules. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Tegra: spi: Move TEGRA114_SPI switch to defconfigsTom Warren2015-08-05-0/+5
|/ | | | | | | | | | | All T114+ Tegra boards should be using the Kconfig TEGRA114_SPI switch. Remove it from include/config and put it into defconfig. Also removed unused TEGRA114_SPI_CTRLS from T114+ configs. All Tegra SoCs build OK with this change. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-08-05-0/+51
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| * x86: Add definitions for the x86-efi board and plumb it inBen Stoltz2015-08-05-0/+16
| | | | | | | | | | | | | | | | Add configuration and Kconfig changes for this board. Signed-off-by: Ben Stoltz <stoltz@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Move Chrome OS options to defconfigSimon Glass2015-08-05-0/+6
| | | | | | | | | | | | | | Drop these from the header file and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: bayleybay: Configure PCI IRQBin Meng2015-08-05-0/+2
| | | | | | | | | | | | | | | | Add PCI IRQ routing information in the board device tree and enable writing PIRQ routing table and MP table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Add Intel Bayley Bay board supportBin Meng2015-08-05-0/+25
| | | | | | | | | | | | | | | | Intel Bayley Bay board is a BayTrail based board. Add this board with existing baytrail fsp support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: qemu: Add MP initializationBin Meng2015-08-05-0/+2
| | | | | | | | | | | | | | | | | | Add a cpu1 node to the device tree and enable the MP initialization on QEMU targets (i440fx and q35). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | sunxi: usb: USB_MUSB_SUNXI move to musb-new KconfigPaul Kocialkowski2015-08-05-21/+21
|/ | | | | | | | | | | Now that the musb-new driver has a Kconfig, we can move Kconfig options to enable controllers to it, so that it's easier in e.g. menuconfig. In addition, this allows declaring support for USB_MUSB_HOST/GADGET in defconfigs instead of the USB_MUSB_SUNXI controller, that will get selected automatically when needed. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-08-02-0/+44
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| * arm: mx6: tqma6: fix build for WRU-IV baseboardStefano Babic2015-08-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | Fix: undefined reference to `spi_flash_free' undefined reference to `spi_flash_probe' Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefan Roese <sr@denx.de>
| * imx: mx6ul_14x14_evk add basic board supportPeng Fan2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Boot Log: U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device Reset cause: POR Board: MX6UL 14x14 EVK I2C: ready DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * sf: kconfig: add kconfig options for spi flashesNikita Kiryanov2015-08-02-0/+8
| | | | | | | | | | | | | | | | | | | | Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig. Cc: Jagan Teki <jteki@openedev.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * usb: kconfig: usb keyboard kconfigNikita Kiryanov2015-08-02-0/+2
| | | | | | | | | | | | | | | | | | | | Add Kconfig options for USB keyboard and use them for cm-fx6. Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: usb: kconfig: add USB_EHCI_MX6 kconfig optionNikita Kiryanov2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb config to defconfig. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: move cm-fx6 target under ARCH_MX6Nikita Kiryanov2015-08-02-0/+1
| | | | | | | | | | | | | | | | | | | | cm-fx6 is an MX6 based board, and the menuconfig hierarchy should reflect that. Make TARGET_CM_FX6 dependant on ARCH_MX6. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: move CMD configs to defconfigNikita Kiryanov2015-08-02-0/+5
| | | | | | | | | | | | | | | | | | | | Move CONFIG_CMD_* options that can be selected in menuconfig to cm-fx6 defconfig. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board supportPeng Fan2015-08-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add DDR script for mx6qpsabreauto board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Boot Log: U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800) CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Board: MX6Q-Sabreauto revA I2C: ready DRAM: 2 GiB PMIC: PFUZE100 ID=0x10 Flash: 32 MiB NAND: 0 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment No panel detected: default to HDMI Display: HDMI (1024x768) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Note: In this patch, we still add a new config mx6qpsabreauto_config, since SPL is not supported now, and IMX_CONFIG is needed at build time, so add this config. Future, when SPL is converted, this config can be removed. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add thermal supportOtavio Salvador2015-07-26-0/+3
| | | | | | | | | | | | | | | | Add thermal support so that we can see the following message on boot: CPU: Industrial temperature grade (-40C to 105C) at 33C Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * arm: mx6: tqma6: Add WRU-IV baseboard for the TQMa6 SoMStefan Roese2015-07-26-0/+12
| | | | | | | | | | | | | | | | | | This patch adds support for the "OHB System AG" baseboard with is equipped with the TQMa6S SoM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-07-31-0/+71
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| * | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040Aneesh Bansal2015-07-31-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal2015-07-31-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/T104xD4: Add Secure boot support for T104xD4RDB platformsgaurav rana2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | defconfig files are added and SFP version for these platforms is updated. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/T104xD4RDB: Add T104xD4RDB boards supportPriyanka Jain2015-07-28-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-07-29-0/+16
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| * | | T210: Add support for 64-bit T210-based P2571 boardTom Warren2015-07-28-0/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with a 32-bit AVP loader). Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | x86: qemu: Enable writing MP tableBin Meng2015-07-28-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable writing MP table for QEMU boads (i440fx and q35). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-0/+1
| | | | | | | | | | | | | | | | | | Move to driver model pci for Intel queensbay/crownbay. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add a RTC node in the device tree to enable DM RTC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> (Squashed in 'x86: Fix RTC build error on ivybridge')
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-2/+16
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| * | | ARM: zynq: Add support for zc770-xm011Michal Simek2015-07-28-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add xm011 DTS file and related configs and configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfigSiva Durga Prasad Paladugu2015-07-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_SYS_TEXT_BASE of ZynqMP_ep to its respective defconfig Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | am3517_evm: add FIT supportYegor Yefremov2015-07-27-0/+1
|/ / | | | | | | | | | | | | | | Enable DTS support (CONFIG_OF_LIBFDT) and select CONFIG_FIT in defconfig. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | sunxi: Enable both ehci and otg in host mode on various boardsHans de Goede2015-07-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | Now that the device-model port of the musb mode makes it possible, enable both the ehci and otg in host mode on boards where the musb is wired up in host only mode, either via an usb-a receptacle or via an usb <-> sata converter. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: ga10h: Enable both otg and regular usb host controllersHans de Goede2015-07-25-0/+2
| | | | | | | | | | | | | | This allows using devices plugged into both ports of the tablet. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: musb: Add id pin supportHans de Goede2015-07-25-0/+3
| | | | | | | | | | | | | | | | | | | | When in host mode check if there is a host cable inserted into the otg port by checking the id pin. If there is no host cable return an error to make usb_lowlevel_init() exit early, rather then waiting for 1 second for a device which will never show up. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
generated by cgit v1.1 at 2024-11-14 22:35:47 +0000