summaryrefslogtreecommitdiff
path: root/configs
Commit message (Collapse)AuthorAgeLines
* ARM: uniphier: move CONFIG_I2C_EEPROM to defconfigMasahiro Yamada2016-07-26-0/+12
| | | | | | | We already have the entry for this option in Kconfig, so let's migrate to it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-26-0/+31
|\
| * arm: ls1021atwr: Add SD secure boot targetSumit Garg2016-07-26-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SD secure boot target for ls1021atwr. Implement board specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-07-26-0/+8
|\ \
| * | defconfig: am57xx_hs_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am57xx_hs_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * | defconfig: am57xx_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am57xx_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: dra7xx_hs_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for dra7xx_hs_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: dra7xx_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for dra7xx_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: am43xx_hs_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am43xx_hs_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: am43xx_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am43xx_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: am335x_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am335x_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | defconfig: am335x_boneblack_vboot: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable i2c driver model for am335x_boneblack_vboot as omap i2c supports driver model. Also enable CONFIG_DM_I2C_COMPAT for legacy drivers of i2c devices. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | config: add config file for evb-rk3399Kever Yang2016-07-25-0/+33
| | | | | | | | | | | | | | | | | | | | | This patch add basic config option for evb-rk3399 board. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | cosmetic: rockchip: rk3036: pinctrl: fix config symbol namingHeiko Stübner2016-07-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip socs are always named rkxxxx in all places, as also shown by the naming of the rk3036 pinctrl file itself. Therefore also name the config symbol according to this scheme. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
* | | cosmetic: rockchip: rk3288: pinctrl: fix config symbol namingHeiko Stübner2016-07-25-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | The rk3288 pinctrl is very specific to this soc, so should not hog the generic rockchip naming. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
* | | rockchip: add basic support for evb-rk3288 boardXu Ziyuan2016-07-25-0/+67
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc). evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | sandbox: Migrate CONFIG_I2C_EEPROMTom Rini2016-07-25-0/+1
| | | | | | | | | | | | | | | | | | Most users of CONFIG_I2C_EEPROM were migrated to defconfig a while ago, but sandbox was skipped. Leave it off for sandbox_spl where it does not build, but does not need to be either. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm64: thunderx_88xx_defconfig: remove unneeded CONFIG_SYS_EXTRA_OPTIONSMasahiro Yamada2016-07-25-1/+0
|/ | | | | | | | ARM64 is correctly select'ed in arch/arm/Kconfig, so this line in the defconfig is unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* igep00x0: UBIizeLadislav Michl2016-07-22-28/+3
| | | | | | | | | | | | Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC boot ROM whole (One)NAND is UBI managed. Also merge NAND and OneNAND defconfigs as now one binary can serve both flashes. As code is too big now, drop CONFIG_SPL_EXT_SUPPORT to make it fit. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-07-22-38/+69
|\
| * zynq: defconfig: Remove unnecessary board specific config filesSiva Durga Prasad Paladugu2016-07-22-7/+7
| | | | | | | | | | | | | | | | | | Remove unnecessary board specifc config files for zynq boards(microzed, picozed, ZC770(all), zed) and point to zynq common config file. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: config: Enable CONFIG_SYS_NO_FLASH through defconfigSiva Durga Prasad Paladugu2016-07-22-0/+9
| | | | | | | | | | | | | | | | Enable config CONFIG_SYS_NO_FLASH through defconfig for all zynq boards. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * usb: zynq: Define config USB_STORAGE through defconfigSiva Durga Prasad Paladugu2016-07-22-0/+6
| | | | | | | | | | | | | | | | Define config USB_STORAGE through defconfig for all respective zynq boards Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQSiva Durga Prasad Paladugu2016-07-22-0/+12
| | | | | | | | | | | | | | | | | | Add Kconfig entry config option for USB_EHCI_ZYNQ and update the same to enable for all zynq boards which supports USB Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable SPL for all zynqmp boardsMichal Simek2016-07-22-0/+35
| | | | | | | | | | | | | | Compile SPL for all boards even psu_init.c/h files are not in the tree yet. But this change enables covering SPL issues in mainline. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable CLK and SPL_CLK by defaultMichal Simek2016-07-22-14/+0
| | | | | | | | | | | | | | Serial driver starts to use clk framework that's why enable it by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq/zynqmp: Use the default CONFIG_BOOTDELAY=2Michal Simek2016-07-22-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | Based on: "ARM: uniphier: use the default CONFIG_BOOTDELAY=2" (sha1: 7c8ef0feb97586d35b0296b48903daef8c06ab21) "I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig, CONFIG_BOOTDELAY=2, is just fine for these boards." Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-07-21-0/+30
|\ \
| * | powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg2016-07-21-0/+30
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. For secure boot target from NAND, the text base for SPL is kept same as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would be different. The virtual address 0xFFFx_xxxx needs to be mapped to physical address 0xBFFx_xxxx. Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 and update DCFG SCRTACH1 register with location of Header required for secure boot. The changes are similar to commit 467a40dfe35f48d830f01a72617207d03ca85b4d powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is only 256K and thus SPL framework is used. The changes are only applicable for SPL U-Boot running out of CPC SRAM and not the next level U-Boot loaded on DDR. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | ARM: tegra: split p2771-0000 buildStephen Warren2016-07-21-2/+33
|/ | | | | | | | | | | | | | | There are multiple versions of p2771-0000 board. There are SW visible incompatible differences between the versions, and they are relevant to U-Boot. Create separate "A02" and "B00" defconfigs (named after the first and/or only board rev the defconfig supports) so that users can select which build they want. With the minimal set of HW currently enabled in U-Boot, the differences are irrelevant, hence the DT files aren't different. However, that will change in a future patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-07-15-0/+19
|\
| * sunxi: Add defconfig and dts file for the Orange Pi Lite SBCHans de Goede2016-07-15-0/+15
| | | | | | | | | | | | | | | | | | | | | | The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM, micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector, sdio attached rtl8189ftv wifi and an ir receiver. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: orangepi_pc: Add support for eMMC found on the Orange Pi PC PlusHans de Goede2016-07-15-0/+2
| | | | | | | | | | | | | | | | | | | | The Plus variant of the Orange Pi PC has an eMMC, add support for this. Note we are using the same u-boot defconfig / dts for both the regular Orange Pi PC as well as the Orange Pi PC Plus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * net: Add EMAC driver for H3/A83T/A64 SoCs.Amit Singh Tomar2016-07-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | This patch add EMAC driver support for H3/A83T/A64 SoCs. Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY). BIG Thanks to Andre for providing some of the DT code. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-07-15-0/+186
|\ \
| * | rockchip: Use of-platdata for firefly-rk3288Simon Glass2016-07-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | As an experiment, move this board over to use of-platdata. This means that its SPL configuration will come from C structures generated at build-time from the device tree, instead of coming from the device tree at run-time. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: sandbox: Enable of-platdata for sandbox_splSimon Glass2016-07-14-0/+1
| | | | | | | | | | | | | | | | | | Enable this feature so that we can use it for testing in sandbox_spl. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Add a new sandbox_spl boardSimon Glass2016-07-14-0/+182
| |/ | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to build SPL for sandbox. It provides additional build coverage and allows SPL features to be tested in sandbox. However it does not need worthwhile to always create an SPL build. It nearly doubles the build time and the feature is (so far) seldom used. So for now, create a separate build target for sandbox SPL. This allows experimentation with this new feature without impacting existing workflows. Signed-off-by: Simon Glass <sjg@chromium.org>
* | configs: da850evm: enable bootz commandSekhar Nori2016-07-14-0/+1
| | | | | | | | | | | | | | | | | | | | Enable bootz command on Texas Instruments DA850 EVM board. This helps it boot zImage with device-tree blob passed. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Kevin Hilman <khilman@baylibre.com>
* | arm: am4x: add U-Boot FIT signing and SPL image post-processingMadan Srinivas2016-07-14-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the SPL build procedure for AM437x high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed (and optionally encrypted) with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm: omap5: add U-Boot FIT signing and SPL image post-processingAndreas Dannenberg2016-07-14-0/+2
|/ | | | | | | | | | | | | | | Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-07-12-0/+126
|\
| * x86: Add Advantech SOM-DB5800/SOM-6867 supportGeorge McCollister2016-07-12-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Advantech SOM-DB5800 with the SOM-6867 installed. This is very similar to conga-qeval20-qa3-e3845 in that there is a reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867) installed. Currently supported: - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on SOM-DB5800. - 4x USB 2.0 (EHCI) - Video - SATA - Ethernet - PCIe - Realtek ALC892 HD Audio Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO HDA_SDI0 is set in DT to enable HD Audio codec. Pin defaults for codec pin complexs are not changed. Not supported: - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500) - USB 3.0 (XHCI) - TPM Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: conga-qeval20-qa3: Add support for internal UARTStefan Roese2016-07-12-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to enable and use the internal BayTrail UART instead of the one integrated in the Super IO Winbond chip. For this, a 2nd defconfig file is added. This is useful for tests done for the congatec SoM used on baseboards without such a Super IO chip. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: baytrail: Introduce a Kconfig option for the internal UARTBin Meng2016-07-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | There are quite a number of BayTrail boards that uses an external SuperIO chipset to provide the legacy UART. For such cases, it's better to have a Kconfig option to enable the internal UART. So far BayleyBay and MinnowMax boards are using internal UART as the U-Boot console, enable this on these two boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-07-11-0/+10
|\ \
| * | defconfig: k2g_evm_defconfig: Enable Cadence QSPI controllerVignesh R2016-07-09-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable Cadence QSPI controller support to use QSPI on K2G SoC. Also enable Spansion flash support to access s25fl512s flash present on K2G QSPI bus. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | defconfig: k2g_evm_defconfig: enable SPI driver modelVignesh R2016-07-09-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPI and SPI Flash driver model as K2G SPI controller driver supports driver model. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | defconfig: k2l_evm_defconfig: enable SPI driver modelVignesh R2016-07-09-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPI and SPI Flash driver model as K2L SPI controller driver supports driver model. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | defconfig: k2e_evm_defconfig: enable SPI driver modelVignesh R2016-07-09-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPI and SPI Flash driver model as K2E SPI controller driver supports driver model. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-08-22 18:43:40 +0000