| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
| |
Switch to using tiny-printf for the firefly SPL, this reduces the SPL by
around 1800 bytes bringing it back under the 32k limit for both gcc 4.9
and gcc 5.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Now that u-boot relocates the malloc area in SPL to SDRAM, with the
malloc area sitting below the SPL_STACK_R_ADDR the
SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for
rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then
STACK_R_MALLOC_SIMPLE_LEN (1Mb).
Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot
from SD card.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
|
| |
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
|
| |
There are already Kconfig options for SPI drivers, but we
have not moved them from config.h to defconfig files. This
commit does this in a batch.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
|
|
|
|
|
| |
Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
|
|
|
|
|
|
|
|
|
|
| |
No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021af96741bd7149ca9895e1f0c8a38d0bb added a new Altera UART
driver.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
| |
Add CMD_GPIO to Kconfig and run tools/moveconfig.py .
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
| |
Some boards' defconfigs are disordered. Reorder them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
|
|
|
|
|
|
|
|
|
| |
With LED support enabled the SPL easily goes over the size limit (e.g.
with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support
in the SPL to reduce the size just enough for those compilers.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tweaked commit subject to remove _SUPPORT
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.
This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.
Signed-off-by: Simon Glass <sjg@chromium.org>
|