| Commit message (Collapse) | Author | Age | Lines |
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Update the config.h and defconfig files for the commands that 8e3c036
converted over to Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
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This syncs up the current cmd/Kconfig and include/configs/ files with the
only exception being CMD_NAND. Due to how we have used this historically
we need to take further care here when converting.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Move all cases of CONFIG_SYS_HUSH_PARSER out of the config.h files. Remove
all cases of CONFIG_SYS_PROMPT_HUSH_PS2 as everyone uses the default.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Some boards' defconfig files are out of order. Clean this up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.
Move these options to Kconfig and tidy up board configuration:
CONFIG_FIT
CONFIG_OF_BOARD_SETUP
CONFIG_OF_SYSTEM_SETUP
CONFIG_FIT_SIGNATURE
CONFIG_FIT_BEST_MATCH
CONFIG_FIT_VERBOSE
CONFIG_OF_STDOUT_VIA_ALIAS
CONFIG_RSA
Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.
Note: Masahiro's moveconfig.py script is amazing.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <trini@konsulko.com>
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The option was renamed to CONFIG_CONSOLE_ROTATION and Rockchip boards
were not updated. However this option is is not needed by default for
Rockchip since we don't need a rotated console for current boards. So just
remove the old option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Enabling CONFIG_DISPLAY breaks building for some architectures
(microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig
by default and enable this option in defconfigs. CONFIG_DISPLAY
depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Enable these devices using the VOPL video output device. We explicitly
disable VOPB in the device tree to avoid it taking over. Since this device
has an LCD display this comes up by default. If the display fails for some
reason then it will attempt to use HDMI. It is possible to force it to fail
(and thus fall back to HDMI) by puting 'return -EPERM' at the top of
rk_edp_probe(). For now there is no easy way to select between the two.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>
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Turn on the EC and enable the keyboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
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To reduce the SPL image size, drop the LED features. Jerry does not have
an LED and we can leave out GPIO support also.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This is not needed for booting, so drop it from SPL to save about 300 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable this PMIC and regulator, which is used on jerry.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Use the full pinctrl driver in U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.
Update the clock drivers and the code that uses them.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This has got out of sequence somehow. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Now that u-boot relocates the malloc area in SPL to SDRAM, with the
malloc area sitting below the SPL_STACK_R_ADDR the
SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for
rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then
STACK_R_MALLOC_SIMPLE_LEN (1Mb).
Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot
from SD card.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
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Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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There are already Kconfig options for SPI drivers, but we
have not moved them from config.h to defconfig files. This
commit does this in a batch.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
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No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021af96741bd7149ca9895e1f0c8a38d0bb added a new Altera UART
driver.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
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Add CMD_GPIO to Kconfig and run tools/moveconfig.py .
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Some boards' defconfigs are disordered. Reorder them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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This builds and displays an SPL message, but does not function beyond that.
Signed-off-by: Simon Glass <sjg@chromium.org>
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