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* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-34/+34
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* common: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-3/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-1/+1
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Improve configuration of FPGA subsystemMatthias Fuchs2008-01-09-1/+1
| | | | | | | | | | | | | This patch removes the FPGA subsystem configuration through the CONFIG_FPGA bitmask configuration option. See README for the new options: CONFIG_FPGA, CONFIG_FPGA_<vendor>, CONFIG_FPGA_<family> Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* Add support for AMD's Pb1x00 eval board;Wolfgang Denk2005-09-25-1/+1
| | | | | | add MII routines to the au1x00 ethernet driver; add USB ohci driver (work in progress) Patch by Thomas Sailer, 20 Jan 2005
* virtex2 fix for bogus download error messagesWolfgang Denk2005-09-24-6/+20
| | | | | | | | | | | | | The virtex2 FPGA download code watches for init going active during a download of config data as an error condition. init also goes active after a configuration is finished in concert with the done signal. So far, the code does not check for done active until all of the configuration data is sent. If configuration data has a few extra pad bytes at the end, this would cause an error message even though the download had suceeded. NOTE: virtex2 slave serial and spartan2 versions may still have the same problem. Patch by Andrew Dyer, 12 Jan 2005
* * Patch by Steven Scholz, 25 Feb 2004:wdenk2004-02-27-3/+3
| | | | | | | | | | | - Timeouts in FPGA code should be based on CFG_HZ - Minor cleanup in code for Altera FPGA ACEX1K * Patch by Steven Scholz, 25 Feb 2004: Changed "Directory Hierarchy" section in README * Patch by Masami Komiya, 25 Feb 2004: Reduce copy count in nfs_read_reply() of NFS code
* Initial revisionwdenk2002-08-21-0/+543