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* da850/omap-l138: add support for direct NOR boot modeLad, Prabhakar2012-09-01-0/+1
| | | | | | | | | | | This patch adds support for direct NOR boot mode on da850/omap-l138. Added da850evm_direct_nor entry in boards.cfg to allow to build targets. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* mpc52xx: remove o2dnt boardAnatolij Gustschin2012-09-01-1/+0
| | | | | | | Remove old o2dnt board without OF support. New support for this board is added by the previous patch, O2I configuration. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* mpc52xx: add common o2dnt and o2dnt2 support and configurationsAnatolij Gustschin2012-09-01-0/+10
| | | | | | | | Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* rename EB+MCF-EV123 to its current marketing name EB+CPU5282Jens Scharsig2012-08-09-2/+2
| | | | | | | | | * rename board directory to eb_cpu5282 * rename EB+MCF-EV123_.*config to eb_cpu5282_.*config * add Maintainer for EB+CPU5282 board * rename prompt Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* mkconfig: add support for SPL CPUAllen Martin2012-08-09-0/+5
| | | | | | | | | | | | | Add support for specifying a differnt CPU for main u-boot and SPL u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows: normal_cpu:spl_cpu This this case CPU will be set to "normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build. Signed-off-by: Allen Martin <amartin@nvidia.com>
* powerpc/p1022ds: add support for SPI and SD bootMatthew McClintock2012-08-08-0/+4
| | | | | | | | | | | | | | | | | | Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/82xx: merge mgcoge.h and mgcoge3ne.h into km82xx.hGerlando Falauto2012-07-31-2/+2
| | | | | | | | | Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need to keep them as separate .h config files. Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h file. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
* tegra: Add Tamonten Evaluation Carrier supportThierry Reding2012-07-09-0/+1
| | | | | | | | | | | The Tamonten Evaluation Carrier is an evaluation board for the Tamonten processor board. More information is available here: http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.html Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-07-08-8/+33
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (212 commits) ARM: cache: Move the cp15 CR register read before flushing the cache. ARM: introduce arch_early_init_r() PXA: Enable CONFIG_PREBOOT on zipitz2 ARM: mx28: Remove CONFIG_ARCH_CPU_INIT No need to define CONFIG_ARCH_CPU_INIT. add new board vl_ma2sc MTD: SPEAr SMI: Add write support for length < 4 bytes i2c: designware_i2c.c: Add support for the "i2c probe" command rtc/m41t62: Add support for M41T82 with HT (Halt Update) SPL: ARM: spear: Add SPL support for SPEAr600 platform Makefile: Add u-boot.spr build target (SPEAr) SPL: ARM: spear: Remove some objects from SPL build SPL: lib/Makefile: Add crc32.c to SPL build SPL: common/Makefile: Add image.c to SPL build arm: Don't use printf() in SPL builds GPIO: Add SPEAr GPIO driver net: Multiple updates/enhancements to designware.c cleanup/SPEAr: Define configuration flags more elegantly cleanup/SPEAr: Remove unnecessary parenthesis SPEAr: Correct SoC ID offset in misc configuration space SPEAr: explicitly select clk src for UART SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION SPEAr: Enable dcache for fast file transfer SPEAr: Enable autoneg for ethernet SPEAr: Enable udc and usb-console support only for usbtty configuration SPEAr: Enable usb device high speed support SPEAr: Initialize SNOR in early_board_init_f SPEAr: Change the default environment variables SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK) SPEAr: Add configuration options for spear3xx and spear6xx boards SPEAr: Add basic arch related support for SPEAr SoCs SPEAr: Add interface information in initialization SPEAr: Add macb driver support for spear310 and spear320 SPEAr: Configure network support for spear SoCs SPEAr: Place ethaddr write and read within CONFIG_CMD_NET SPEAr: Eliminate dependency on Xloader table SPEAr: Fix ARM relocation support st_smi: Fixed page size for Winbond W25Q128FV flash st_smi: Change timeout loop implementation st_smi: Fix bug in flash_print_info() st_smi: Change the flash probing method st_smi: Removed no needed dependency on ST_M25Pxx_ID st_smi: Fix smi read status st_smi: Move status register read before modifying ctrl register st_smi: Read status until timeout happens st_smi: Enhance the error handling st_smi: Change SMI timeout values st_smi: Return error in case TFF is not set st_smi: Add support for SPEAr SMI driver mtd/NAND: Remove obsolete SPEAr specific NAND drivers SPEAr: Configure FSMC driver for NAND interface mtd/NAND: Add FSMC driver support arm/km: remove calls to kw_gpio_* in board_early_init_f arm/km: add implementation for read_dip_switch arm/km: support the 2 PCIe fpga resets arm/km: skip FPGA config when already configured arm/km: redefine piggy 4 reg names to avoid conflicts arm/km: cleanup km_kirkwood boards arm/km: enable BOCO2 FPGA download support arm/km: remove portl2.h and use km_kirkwood instead arm/km: convert mgcoge3un target to km_kirkwood arm/km: add kmcoge5un board support arm/km: add kmnusa board support arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0 cm-t35: fix incorrect NAND_ECC layout selection ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls. ARM: OMAP4/5: Move USB pads to essential list. ARM: OMAP4/5: Move USB clocks to essential group. ARM: OMAP4/5: Move gpmc clocks to essential group. ARM: OMAP4+: Move external phy initialisations to arch specific place. omap4: Use a smaller M,N couple for IVA DPLL da850/omap-l138: Enable auto negotiation in RMII mode omap: am33xx: accomodate input clocks other than 24 Mhz omap: emif: fix bug in manufacturer code test omap: emif: deal with rams that return duplicate mr data on all byte lanes OMAP4+: Force DDR in self-refresh after warm reset OMAP4+: Handle sdram init after warm reset ARM: OMAP3+: Detect reset type arm: bugfix: Move vector table before jumping relocated code Kirkwood: Add support for Ka-Ro TK71 arm/km: use spi claim bus to switch between SPI and NAND arm/kirkwood: protect the ENV_SPI #defines ARM: don't probe PHY address for LaCie boards lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2 lacie_kw: fix SDRAM banks number for net2big_v2 Kirkwood: add lschlv2 and lsxhl board support net: add helper to generate random mac address net: use common rand()/srand() functions lib: add rand() function kwboot: boot kirkwood SoCs over a serial link kw_spi: add weak functions board_spi_claim/release_bus kw_spi: support spi_claim/release_bus functions kw_spi: backup and reset the MPP of the chosen CS pin kirkwood: fix calls to kirkwood_mpp_conf kirkwood: add save functionality kirkwood_mpp_conf function km_arm: use filesize for erase in update command arm/km: enable mii cmd arm/km: remove CONFIG_RESET_PHY_R arm/km: change maintainer for mgcoge3un arm/km: fix wrong comment in SDRAM config for mgcoge3un arm/km: use ARRAY_SIZE macro arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE arm/km: add piggy mac adress offset for mgcoge3un arm/km: add board type to boards.cfg AT91SAM9*: Change kernel address in dataflash to match u-boot's size ATMEL/PIO: Enable new feature of PIO on Atmel device ehci-atmel: fix compiler warning AT91: at91sam9m10g45ek : Enable EHCI instead OHCI Atmel : usb : add EHCI driver for Atmel SoC Fix: AT91SAM9263 nor flash usage Fix: broken boot message at serial line on AT91SAM9263-EK board i.MX6 USDHC: Use the ESDHC clock mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register i.MX28: Add function to adjust memory parameters mx28evk: Fix PSWITCH key position mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove unused CONFIG_MII_GASKET mx6: Avoid writing to read-only bits in imximage.cfg m28evk: use same notation to alloc the 128kB stack ... Signed-off-by: Wolfgang Denk <wd@denx.de>
| * add new board vl_ma2scesw@bus-elektronik.de2012-07-07-0/+2
| | | | | | | | | | | | | | | | * add support for board VL+MA2SC * adds vl_ma2sc_config for standard NOR boot configuration * adds vl_ma2sc_ram_config for RAM load configuration Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
| * SPEAr: Add configuration options for spear3xx and spear6xx boardsVipin KUMAR2012-07-07-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds options for all the below mentioned configurations and subsequently renames the include/configs/spearxxx.h files to spear3xx_evb.h, spear6xx_evb.h etc to depict evaluation board configuration. SPEAr3xx and SPEAr6xx boards can be compiled in following configurations 1. Environment placed in NAND 2. Console on usb device 3. Console on usb device with environment placed in NAND 4. SPEAr310 and SPEAr320 support environment variables in parallel NOR flash. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm/km: cleanup km_kirkwood boardsHolger Brunck2012-07-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove config options from boards.cfg and simply add one switch per board and differ afterwards in km_kirkwood.h between the features. More boards are upcoming and therefore it's easier to have this at one place. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: enable BOCO2 FPGA download supportValentin Longchamp2012-07-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a first support of the FPGA download for a PCIe FPGA based on the BOCO2 CPLD. This takes place in 3 steps, all done accessing the SPICTRL reg of the BOCO2: 1) start the FPGA config with an access to the FPGA_PROG bit 2) later in the boot sequence, wait for the FPGA_DONE bit to toggle to 1 for the end of the FPGA configuration (with a timeout) 3) reset the FPGA 4) finally remove the access to its config EEPROM from the FPGA so that the CPU can update the FPGA configuration when the kernel is running The boards with a PCIe FPGA but without BOCO2 still are supported. The config option name is CONFIG_KM_FPGA_CONFIG Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: remove portl2.h and use km_kirkwood insteadHolger Brunck2012-07-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The additional headerfile is unneeded here, we can use the generic km_kirkwood.h instead. And we can use the better config option KM_PIGGY4_88E6061 for the specific features for boards with this design in km_arm.c. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: convert mgcoge3un target to km_kirkwoodHolger Brunck2012-07-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the generic header km_kirkwood.h and get rid of the board specific header. changes for v2: rebased because of changes in other patches Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: add kmcoge5un board supportHolger Brunck2012-07-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | For u-boot this board is similar to mgcoge3un. But some differences are present. We have a different SDRAM on it and therefore a new SDRAM config file. Additionaly this board has a direct MAC/MAC connection from the kirkwood to a marvell simple switch without a phy inbetween, this needs a new configuration for the mvgbe driver. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: add kmnusa board supportHolger Brunck2012-07-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is similar to portl2, but it has the u-boot environment in a SPI NOR flash and not in an i2c eeprom like portl2 have. Some other details: - IVM EEPROM is at adress: pca9547:70:9 - PCI is enabled - PIGGY4 is connected via MV88E6352 simple switch. There is no phy between the simple switch and the kirkwood. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * Kirkwood: Add support for Ka-Ro TK71Marek Vasut2012-07-07-0/+1
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>
| * Kirkwood: add lschlv2 and lsxhl board supportMichael Walle2012-07-07-0/+2
| | | | | | | | | | | | | | | | This patch adds support for both the Linkstation Live (LS-CHLv2) and Linkstation Pro (LS-XHL) by Buffalo. Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
| * arm/km: add board type to boards.cfgHolger Brunck2012-07-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | Some other kirkwood boards from keymile will follow. They will have some small differences, but we want to use the km_kirkwood.h for all to distinguish them. This patch a preparation for this. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
| * tegra: Compulab TrimSlice board supportStephen Warren2012-07-07-0/+1
| | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Whistler board supportStephen Warren2012-07-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | powerpc/mpc85xx:Add BSC9131 RDB SupportPrabhakar Kushwaha2012-07-06-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements BSC9131RDB Overview ----------------- -1Gbyte DDR3 (on board DDR) -128Mbyte 2K page size NAND Flash -256 Kbit M24256 I2C EEPROM -128 Mbit SPI Flash memory -USB-ULPI -eTSEC1: Connected to RGMII PHY -eTSEC2: Connected to RGMII PHY -DUART interface: supports one UARTs up to 115200 bps for console display Apart from the above it also consists various peripherals to support DSP functionalities. This patch adds support for mainly Power side functionalities and peripherals Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* powerpc/83xx: add kmcoge5ne board supportHolger Brunck2012-06-15-1/+2
| | | | | | | | | | | | | | | | | | This board is a MPC8360 board. Two flashes are present a NOR flash were u-boot and the u-boot environment is stored and a NAND flash for the application code. This board has 512MB SDRAM. Additionaly we introduce a common km8360.h file and convert kmeter1 to use this. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Christian Herzig <christian.herzig@keymile.com> cc: Kim Phillips <kim.phillips@freescale.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/83xx/km: use tuxx1.h for kmsupx5 targetHolger Brunck2012-06-15-4/+4
| | | | | | | | | | | | This additional header is unneeded, we can use the tuxx1.h for this target. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Kim Phillips <kim.phillips@freescale.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* sh: Add SH7269 device and RSK2+SH7269 boardPhil Edworthy2012-05-28-0/+1
| | | | | | | | | | | | This is an sh2a device (max 266MHz) with FPU, video display controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports, SD and on-chip USB. The RSK2+SH7269 board uses the SH7269 processor. It is often referred to as just rsk7269. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* sh: Add support for AP-SH4A-4A boardNobuhiro Iwamatsu2012-05-28-0/+1
| | | | | | | | | | | | | | | The AP-SH4A-4A board has SH7734, 64MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 64MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SH-Ether with Gigabit) - I2C Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* sh: Add support for r0p7734 boardNobuhiro Iwamatsu2012-05-28-0/+1
| | | | | | | | | | | | | | The r0p7734 board has SH7734, 128MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 128MB DDR2-SDRAM - 32MB NOR Flash memory - Serial console (SCIF) - Ethernet (SH-Ether/SMSC) Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* MX53: Add support to ESG ima3 boardStefano Babic2012-05-15-0/+1
| | | | | | | | The ESG ima3-mx53 board is based on the Freescale i.MX53 SOC. It boots from NOR (128 MB) and supports Ethernet (FEC), SATA. Signed-off-by: Stefano Babic <sbabic@denx.de>
* OMAP3: igep00x0: Reduce lines of code for IGEP-based boards.Enric Balletbò i Serra2012-05-15-2/+2
| | | | | | | | | | | | | | This is rework on config files of IGEP-based boards with the aim to remove duplicated code to be more maintainable. Basically this patch creates a common configuration file for both boards and only sets the specific option in the board config file. On board files the hardcored mach type was replaced in favour of using the CONFIG_MACH_TYPE option. More than 200 duplicated lines have been deleted. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
* kirkwood: add support for Cloud Engines Pogoplug E02David Purdy2012-05-15-0/+1
| | | | | | | | | | | This patch adds support for Cloud Engines Pogoplug E02 Information regarding the CE Pogoplug E02 board can be found at: http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray Signed-off-by: Dave Purdy <david.c.purdy@gmail.com> Cc: prafulla@marvell.com Cc: albert.u.boot@aribaud.net
* kirkwood: add NAS62x0 board supportLuka Perkov2012-05-15-0/+1
| | | | | | | | | | | | | | | Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220. NAS6210 has 1 SATA and 1 eSATA port while NAS6220 has 2 SATA ports. More information about the boards can be found here: http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515 Signed-off-by: Luka Perkov <uboot@lukaperkov.net> Signed-off-by: Gerald Kerma <dreagle@doukki.net> Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
* devkit3250: add Timll DevKit3250 board initial supportVladimir Zapolskiy2012-05-15-0/+1
| | | | | | | | | | | This change adds a basic support for Embest/Timll DevKit3250 board, NOR and UART are the only supported peripherals for a moment. The board doesn't require low-level init, because the initial SDRAM and GPIO configuration is performed during kickstart bootloader execution. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2012-04-30-1/+1
|\ | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: powerpc/ppc4xx: Remove typedefs for gdsys FPGA powerpc/ppc4xx: Fix typo in gdsys_fpga.h powerpc/ppc4xx: Update gdsys board configurations powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20 powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes powerpc/ppc4xx: Make gdsys 405ep boards reset more generic powerpc/ppc4xx: Adjust environment size on neo
| * powerpc/ppc4xx: Make gdsys 405ep boards reset more genericDirk Eibach2012-04-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to add boards that have different hardware for fpga reset, any 405ep gdsys board now provides these functions: void gd405ep_init(void); void gd405ep_set_fpga_reset(unsigned state); void gd405ep_setup_hw(void); int gd405ep_get_fpga_done(unsigned fpga); Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-04-30-0/+7
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot cmd_bdinfo: display the address map size (32-bit vs. 36-bit) PowerPC: correct the SATA for p1/p2 rdb-pc platform powerpc/corenet_ds: Slave core in holdoff when boot from SRIO powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO powerpc/corenet_ds: Slave uploads ucode when boot from SRIO powerpc/corenet_ds: Slave module for boot from SRIO powerpc/corenet_ds: Master module for boot from SRIO powerpc/corenet_ds: Document for the boot from SRIO powerpc/corenet_ds: Correct the compilation errors about ENV powerpc/srio: Rewrite the struct ccsr_rio powerpc/85xx:Fix lds for nand boot debug info powerpc/p2041rdb: add env in NAND support powerpc/p2041rdb: add NAND and NAND boot support powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards powerpc/85xx:Avoid vector table compilation for nand_spl powerpc/85xx:Fix IVORs addr after vector table relocation powerpc/85xx:Avoid hardcoded vector address for IVORs powerpc/p1023rds: Disable nor flash node and enable nand flash node
| * | powerpc/corenet_ds: Slave module for boot from SRIOLiu Gang2012-04-24-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. 5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode locally. For the slave module, need to finish these processes: 1. Set the boot location to SRIO1 or SRIO2 by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot. 4. Slave's u-boot image should be generated specifically by make xxxx_SRIOBOOT_SLAVE_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Master module for boot from SRIOLiu Gang2012-04-24-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. For the master module, need to finish these processes: 1. Initialize the SRIO port and address space. 2. Set inbound SRIO windows covered slave's u-boot image stored in master's NOR flash. 3. Master's u-boot image should be generated specifically by make xxxx_SRIOBOOT_MASTER_config 4. Master must boot first, and then slave can be powered on. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/p2041rdb: add NAND and NAND boot supportShaohui Xie2012-04-24-0/+1
| |/ | | | | | | | | | | | | | | New P2041RDB board will add a NAND chip, so add support for NAND and NAND boot. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | board/adp-ag102: add configuration of adp-ag102Macpaul Lin2012-04-22-0/+1
|/ | | | | | | | | | | | board: Add config file of board adp-ag102 Add adp-ag102 into boards.cfg Add adp-ag102 into MAINTAINERS doc: add README of ag102 Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* MIPS: fix endianess handlingDaniel Schwierzeck2012-04-02-1/+1
| | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* OMAP: Remove omap1610inn-based boardsTom Rini2012-03-29-8/+0
| | | | | | | | The CS_AUTOBOOT configurations have been broken for a long time. Kshitij Gupta is no longer at TI making these broken and orphaned boards, so remove. Signed-off-by: Tom Rini <trini@ti.com>
* IXP: Move PDNB3 and SCPU from Makefile to boards.cfgMarek Vasut2012-03-26-0/+2
| | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de>
* dm6467Tevm: Use a common configuration file for davinci_dm6467evm and ↵prabhakar.csengg@gmail.com2012-02-27-2/+2
| | | | | | | | | | | | | | | | | | | | davinci_dm6467Tevm In commit 2d575e46859dd9127a9cec731ace77523e6ea2ab a separate header file was introduced for the DM6467T EVM, include/configs/davinci_dm6467Tevm.h. The substantial difference between the davinci_dm6467evm and the davinci_dm6467Tevm configuration is a single bit in the hardware revision that is passed to the Linux kernel and davinci_dm6467evm has REFCLK_FREQ = 27000000 where as davinci_dm6467Tevm.h has a REFCLK_FREQ = 33000000. This patch removes include/configs/davinci_dm6467Tevm.h. Instead the include/configs/davinci_dm6467evm.h configuration is used for DM6467T EVMs and renamed CFG_REFCLK_FREQ to CONFIG_REFCLK_FREQ and CONFIG_REFCLK_FREQ is defined in boards.cfg. Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Cc: Tom Rini <trini@ti.com>
* da850evm: read mac address from I2C EEPROM on AM18x EVMHadli, Manjunath2012-02-27-1/+1
| | | | | | | | | | | | | | | add support to read mac address for AM18x EVM manufactured from Spectrum digital which have mac address stored in I2C EEPROM manufactured by WINBOND. This patch reads mac address from I2C EEPROM and sets the environment variable if not set, If mac address is already present in environment compare it with the mac address in EEPROM and warn on mismatch.Introduced a config option CONFIG_MAC_ADDR_IN_EEPROM to where to look for the mac address. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Wolfgang Denk <wd@denx.de>
* da850evm: add support to read mac address from SPI flashHadli, Manjunath2012-02-27-1/+1
| | | | | | | | | | | | | | | add support to read mac address for da850/L138 evm manufactured by Logic PD which store mac address in SPI flash manufactured by ST Microelectronics. This patch adds support to read mac address from SPI flash and set the mac address if it hasn't been set in environment, If it has been set in the environment it compares the value one with SPI flash and warns on mismatch. Introduced a config option CONFIG_MAC_ADDR_IN_SPIFLASH indicating where to look mac address for. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2012-02-13-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-blackfin: Blackfin: pata_bfin: fix printf warning Blackfin: bfin_nand: mark local func static linkage.h: move from blackfin to common includes Blackfin: br4: new board port Blackfin: add in/out le32 variants post: add blackfin to the post_time_ms list Blackfin: bf537-stamp: drop board reset workaround Blackfin: pr1: new board port
| * Blackfin: br4: new board portDimitar Penev2012-02-12-0/+1
| | | | | | | | | | | | | | | | This adds support for the BR4 Appliance. It is a quad channel ISDN BRI board based on Blackfin BF537 CPU. Signed-off-by: Dimitar Penev <dpn@switchfin.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: pr1: new board portDimitar Penev2012-02-12-0/+1
| | | | | | | | | | | | | | | | This add support for the PR1 Appliance - Asterisk based ISDN PRI PBX. This board is Blackfin BF537 based. The schematics are not fully opened. Signed-off-by: Dimitar Penev <dpn@switchfin.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | arm, davinci: Add support for the Calimain board from OMICRON electronicsChristian Riesch2012-02-12-0/+1
| | | | | | | | | | | | | | | | | | This patch adds support for the Calimain board from OMICRON electronics GmbH. The board features a Texas Instruments AM1808 SoC, 128 MB DDR2 memory, and 64 MB NOR flash memory connected to CS2 and CS3. Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
generated by cgit v1.1 at 2024-11-05 16:56:29 +0000