| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
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Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
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This patch adds support for the MPC8247 based board mgcoge3ne.
Additionaly mgcoge2ne board supprot was removed, because due
to the mgcoge3ne, this board is obsolete and not longer
maintained.
The board is similar to mgcoge. The difference is that
a NUMONYX flash is used and a different SDRAM (256MB).
Also introduce CONFIG_KM_82XX to collect ppc82xx common
settings and remove staticness from the common set_pin function.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
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The directory and file mgcoge was renamed to km82xx.
Because other keymile 82xx will follow and will use the
same platform code.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The P3041DS & P5020DS boards are almost identical (except for the
processor in them). Additionally they are based on the P4080DS board
design so we use the some board code for all 3 boards.
Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have
meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock
configuration.
Additionally, the P3041DS/P5020DS support NAND.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Keymile SUPx5 board series is based on a PBEC8321 but
contains an additional PBUS FPGA (LPXF) on local bus CS2.
Signed-off-by: Thomas Reufer <thomas.reufer@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
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The mgcoge2 board from keymile deploys two different processors.
An ARM based Kirkwood for the "unit" part of the SW and a PPC for
the "ne" part of the SW. Therefore in Linux and U-Boot the names
for the board are mgcoge2un and mgcoge2ne. This patch adds the
mgcoge2ne part of the board. The ppc part of mgboge2 is quite
similar to mgcoge, therefore a generic header km82xx-common.h
was introduced to collect all similiarities. Currently the only
difference is that mgcoge2ne has a 64 MB numonyx NOR flash with
a single die. The mgcoge has a dual die flash 2*32MB from spansion.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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The Kirwood based SUEN8 board from Keymile is at this stage
the same than the suen3 board. This patch adds the board
support for the suen8.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
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This board is similar to keymile suen3.
Signed-off-by: Clive Stubbings <clive.stubbings@xentech.co.uk>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
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This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.
Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.
Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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- serial console on UART1
- Ethernet RMII over UCC4
- PHY SMSC LAN8700
- 64MB Flash
- 128 MB DDR2 RAM
- I2C
- bootcount
This board is similiar to the kmeter1 (8360) board,
so common config options are extracted into the
include/configs/km83xx-common.h file.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
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- fix board support following relocation changes
- switch to boards.cfg
- disable i2c to keep size under 128kiB (1 sector)
Signed-off-by: Eric Bénard <eric@eukrea.com>
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- update to new relocation code
- switch to boards.cfg
- get rid of LEGACY (still a little hack in .h to compile)
- add nand boot configuration
- boot tested for the following configurations :
9260 (64MB RAM & nor boot)
9260_nand (64MB RAM & nand boot)
9G20_128M (128MB RAM & nor boot)
9G20_nand_128M (128MB RAM & nand boot)
(nor boot is using lowlevel init)
Signed-off-by: Eric Bénard <eric@eukrea.com>
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Board support for the DIG297 board manufactured by Comelit Group SpA.
It is a custom board based on the BeagleBoard <http://beagleboard.org/> by
Texas Instruments.
The board support is based on the BeagleBoard implementation.
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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It is a low cost reference design based on Sitara AM3517 SoC from Texas Instruments
Please refer to <www.craneboard.org> for more details.
Signed-off-by: Srinath <srinath@mistralsolutions.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg
Signed-off-by: Jason Liu <r64343@freescale.com>
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The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Old address of RESET_VECTOR were overwritten by the bss sector, making
impossible its run from xmd.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.
Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Chong Huang <chuang@ucrobotics.com>
Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Info about the hardware can be found here:
http://www.dilnetpc.com/dnp0086.htm
Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Conflicts:
drivers/usb/host/ehci-pci.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
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We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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All current CPUs and SoCs are based on MIPS32 arch. The complete
code resides in the global arch/mips/cpu directory. This is not
suitable if other MIPS architectures like MIPS64 or Octeon should
be supported in the future.
To achieve this the current CPU code is moved to its own mips32
subdirectory. All MIPS32 boards have to use mips32 as config switch
in board.cfg.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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The Purple SoC and eval board are not actively maintained since years.
This patch removes the support completely as aggreed with Wolfgang Denk.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC & MMC x8 card
With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
* Dual analog mics & speakers, headset jack, LED, ambient
* USB2.0 HS host, OTG (mini AB)
* GPIO, GPIO expander with DIP switches for easier selection
* UART serial over USB, CIR
This patch adds basic board support with DRAM and UART functionality
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Stefan Roese <sr@denx.de>
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At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to
work with boards.cfg.
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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CONFIG_QEMU_MIPS is already provided by <configs/qemu-mips.h>, so we
don't generate it using the options fields in boards.cfg.
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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CONFIG_GTH2 is already provided by <configs/gth2.h>, so we don't
generate it using the options fields in boards.cfg.
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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Position independant functionality is due for removal from the x86
architecture, so create two distinct configurations - One for Flash and
one for SRAM
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We should have been defining the actual board name in the options, not
the processor. Fix this for P1011RDB, P1020RDB, P2010RDB, and P2020RDB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Board support for the Guntermann & Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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The R0P7757LC0030RL board has SH7757, 256MB DDR3-SDRAM, SPI ROM,
Ethernet, and more.
This patch supports the following functions:
- 256MB DDR3-SDRAM
- SPI ROM
- Ethernet
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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