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* MLK-9652 Android: imx6sxsabreauto: Add android features supportYe.Li2014-10-09-0/+2
| | | | | | Add android fastboot, recovery and booti support for mx6sx sabreauto board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00333317 imx: mx6sxsabreauto: Add BSP support for AI boardYe.Li2014-09-26-0/+3
| | | | | | | | | | | | | | | | Create mx6sx sabreauto BSP file and configurations. The devices below have been supported: 1. SD/MMC/eMMC on SDA/SDB (base board) sockets 2. USB OTG port and USB HOST port (base board) 3. NAND flash 4. QuadSPI flash on QSPI1 5. I2C 6. PMIC PFUZE100 7. Onboard ethernet chip on ENET2 8. Splash screen on LVDS Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00333299: Add support for i.MX6SX 14x14 lpddr2 arm2 boardNitin Garg2014-09-25-0/+1
| | | | | | | Add support for i.MX6SX 14x14 lpddr2 arm2 board, same as 17x17 arm2 except lpddr2 instead of ddr3. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00328278-1: Fix i.MX6DQ/DL arm2 LPDDR2 boards mem sizeNitin Garg2014-09-04-4/+4
| | | | | | | Couple of issues in commit 21a2eb5f. The RAM size is wrong and max number of DCD is 220. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00328278: Add support for i.MX6DQ/DL arm2 LPDDR2 boardsNitin Garg2014-08-28-2/+4
| | | | | | Add support for i.MX6DQ/DL arm2 LPDDR2 boards. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00319772 iMX6SX:ARM2: Add EIM-NOR support for 17x17 ARM2 boardYe.Li2014-06-25-0/+1
| | | | | | | | | | | | | | The NOR flash PC28F00AG18 has 512 of 256KB erase blocks which are locked after power on reset. Change the 17x17 ARM2 configurations to match the flash parameters, and enable the CONFIG_SYS_FLASH_PROTECTION to allow write to the flash. The EIM-NOR on 17x17 ARM2 board uses MUXed mode. This has less effort on board rework. When boot from EIM-NOR, set SW8, SW7, SW5 to all off. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-75 iMX6SX:SABRESD Support the reworked eMMC on SD4Ye.Li2014-06-17-0/+1
| | | | | | | | | | | | | | The eMMC chip on iMX6SX SABRESD board is DNP at default. HW rework is needed to weld it on the eMMC socket and disconnect SD card slot. The pins IOMUX of eMMC are different with SD card slot: 1. The eMMC uses 8 data pins, while SD card slot only uses 4 bits. 2. The CD pin used by SD card slot works as a data pin for eMMC. So adding a new u-boot target "mx6sxsabresd_emmc" for the eMMC support, rather than using the SD boot configuration. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-68 iMX6SX:SABRESD: Add Android features supportYe.Li2014-06-17-0/+1
| | | | | | | Add BSP codes to mx6sxsabresd to support android uboot features: fastboot, booti and recovery Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-66 iMX6SX:SABRESD Support M4 fast boot at early stageYe.Li2014-06-17-0/+1
| | | | | | | | | | | | | | | | T support M4 boot in 50 ms, kick start M4 at "board_early_init_f" stage where u-boot passes ARM and architecture initialization. Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature enablement. And a build config "mx6sxsabresd_m4fastup". Adjust the default M4 image address to 0x78000000 represented by "CONFIG_SYS_AUXCORE_BOOTDATA". When M4 fast boot is enabled, RDC should be enabled together and the QSPI driver must turn off, because M4 is running on QSPI flash in XIP. Setup this relationship by configurations. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-64 iMX6SX: Add MX6SX SABRE SD board supportYe.Li2014-06-17-0/+2
| | | | | | | | | | | | Add BSP codes for iMX6SX SABRE SD board to support SD/MMC, USB, QSPI2 NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Add board build targets of SABER SD for boot device: mx6sxsabresd --- SD/MMC mx6sxsabresd_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-63 iMX6SX: Add MX6SX 19x19 LPDDR2 ARM2 board supportYe.Li2014-06-17-0/+2
| | | | | | | | Add script "imximage_lpddr2.cfg" for DDR controller settings of LPDDR2. Modify "plugin.S" for LPDDR2. Add build target for 19x19 LPDDR2 ARM2 board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-62 iMX6SX: Add MX6SX 19x19 DDR3 ARM2 board supportYe.Li2014-06-17-0/+4
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 19x19 DDR3 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, WEIM NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Some features has conflicts, so can't be enabled at same time: WEIM-NOR <---> QSPI pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 19x19 DDR3 ARM2 for boot device: mx6sx_19x19_ddr3_arm2 --- SD/MMC/eMMC mx6sx_19x19_ddr3_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_19x19_ddr3_arm2_eimnor --- WEIM NOR flash mx6sx_19x19_ddr3_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-61 iMX6SX: Add MX6SX 17x17 ARM2 board supportYe.Li2014-06-17-0/+4
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 17x17 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, NAND Flash, Ethernet, I2C ,PMIC and M4 command boot (bootaux). Some features has conflicts, so can't be enabled at same time: QSPI <---> NAND pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 17x17 ARM2 for boot device: mx6sx_17x17_arm2 --- SD/MMC/eMMC mx6sx_17x17_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_17x17_arm2_nand --- NAND flash mx6sx_17x17_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-46 i.mx6slevk: Enable SPI NOR flash at defaultYe.Li2014-06-17-2/+2
| | | | | | | | | Default imx6slevk BSP supports SPI NOR flash read, write and erase by using "sf" command. The "mx6slevk_spinor" builds the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-45 ARM:imx6:sabreauto Add USB HOST BSP supportYe.Li2014-06-17-6/+6
| | | | | | | | | | | | Sabreauto board has pin conflict (pin EIM_D18) between NOR flash and i2c3. To enable the USB host, the i2c3 must be used to operate the max7310 IO expander to output the VBUS power. As SPINOR is enabled at default, it is impossible to use USB host at same time. Thus, remove the SYS_USE_SPINOR from sabreauto configurations to disable SPINOR. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-42 i.mx6:sabreauto/sabresd/slevk Add Android build targetsYe.Li2014-06-17-0/+10
| | | | | | | Add build targets for enabling android support on i.mx6sabreauto/sabresd and i.mx6slevk boards Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board supportYe.Li2014-06-17-1/+2
| | | | | | | | | | | | | | | | This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. The patch has been tested on the i.MX6Q and i.MX6DL arm2 board. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-21 imx6/sabreauto: add the plugin mode supportYe.Li2014-06-17-5/+5
| | | | | | | | | This patch add the plugin mode support for sabreauto board. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6qsabre_common.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-17 imx6q:sabresd/sabreauto: add SATA supportYe.Li2014-06-17-0/+2
| | | | | | | | This patch adds the SATA support for i.mx6qsabresd and i.mx6qsabreauto board Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-10 i.mx6:sabreauto: Add the GPMI nand supportYe.Li2014-06-17-0/+3
| | | | | | | | | | | Add the GPMI nand support to the iMX6 sabreauto: --Enable the GPMI NAND at default. --Enable the clocks --Set the default environment for nand boot Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-9 i.mx6q/dl/solo:sabreauto: Add the WEIM-NOR supportYe.Li2014-06-17-0/+3
| | | | | | | Add the WEIM-NOR support Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-7 i.mx6q/dl/solo: sabresd/sabreauto: Add the SPI-NOR supportYe.Li2014-06-17-6/+9
| | | | | | | | | | This patch adds the SPI-NOR support for the i.mx6q/dl/solo:sabresd/auto board: - Support the SPI-NOR function with sf command, - Support the enviroment from SPI-NOR when CONFIG_SYS_BOOT_SPINOR Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-6 i.mx6:sabreauto: Add the i.MX6solo sabreauto supportYe.Li2014-06-17-0/+1
| | | | | | | | | | | | | This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-5 i.mx6:sabreauto: Add the i.MX6DL sabreauto board supportYe.Li2014-06-17-0/+1
| | | | | | | | | | | | | This patch is to add the i.MX6DL sabreauto board support. i.MX6DL sabreauto board share the same design with i.MX6Q sabreauto board except the SOC difference. The DDR script has been updated to the v0.2 version from ddr-scripts-rel.git, the commit based on is: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-3 iMX6q:SABREAUTO: Rename the imximage.cfg to mx6q.cfgYe.Li2014-06-17-1/+1
| | | | | | | Rename the imximage.cfg to mx6q.cfg. No function change at all. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-2 iMX6:SABRESD: Add the i.MX6solo SABRESD board supportYe.Li2014-06-17-0/+1
| | | | | | | | | | The i.MX6solo sabre-sd board configuration has the following difference with i.MX6dl sabre-sd: - DDR bus width: 32bit - DDR capacity: 512M Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-1 iMX6q/dl:SABREAUTO/SABRESD: Refactor configurations for more ↵Ye.Li2014-06-17-3/+3
| | | | | | | | | | | | | iMX6 boards 1. Make the DDR size configurable based on the boards.cfg 2. Make the FDT file configurable based on the boards.cfg 3. Add DDR and boot configuration script for iMX6dl. Change default boot from SD card. The DDR script has been updated to the v1.5 version from ddr-scripts-rel commit: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access supportNitin Garg2014-06-13-0/+2
| | | | | | | | | | | Add BSP codes to support SPI NOR flash read, write and erase by using "sf" command. In addition, add a new configuration "mx6slevk_spinor" for building the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-80/+82
|\ | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| * boards.cfg: Run the reformatter scriptTom Rini2014-03-11-20/+20
| | | | | | | | | | | | Some recent changes got parts of the file out of order again, correct. Signed-off-by: Tom Rini <trini@ti.com>
| * boards.cfg: move boards with invalid emails to OrphanMasahiro Yamada2014-03-11-60/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I cc board maintainers, some of them result in bounce mails. It turned out the following do not work any more: Yuli Barcohen <yuli@arabellasw.com> Travis Sawyer <travis.sawyer@sandburst.com> Yusdi Santoso <yusdi_santoso@adaptec.com> David Updegraff <dave@cray.com> Sangmoon Kim <dogoil@etinsys.com> Anton Vorontsov <avorontsov@ru.mvista.com> Blackfin Team <u-boot-devel@blackfin.uclinux.org> Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> Andre Schwarz <andre.schwarz@matrix-vision.de> For the blackfin boards where Sonic Zhang is also listed as a maintainer, dead addresses should be simply dropped. For all of the others, the status should be changed to "Orphan". We have adopted the definition of "Orphan" as: board is not actively maintained any more but still builds, and any address associated with it is that of the last known maintainer(s) Even though the emails do not work any more, they carry information. We want to keep them. Besides, Orphan boards have been collected at the bottom of boards.cfg. (This is done when we run "tools/reformat.py") Add separators to distinguish them from those which were moved to Orphan 6 months ago. I believe it will be helpful in future to find which boards are old enough to be removed from the code base. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Detlev Zundel <dzu@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-13-0/+5
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| * ventana: Add Gateworks Ventana family supportTim Harvey2014-03-12-0/+5
| | | | | | | | | | | | | | | | | | Gateworks Ventana is a product family based on the i.MX6. This patch adds support for all boards in the Ventana family. Where possible, data from the boards EEPROM is used to determine various details about the board at runtime. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-0/+2
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| * | ARM: atmel: add sama5d3 Xplained board supportBo Shen2014-03-09-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC. Now it supports boot from NAND flash and SD/MMC card. Features support: - NAND flash - SD/MMC card - Two USB hosts - Ethernet (one GMAC, one EMAC) Signed-off-by: Bo Shen <voice.shen@atmel.com> [reorder boards.cfg] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | m68k: Remove M5271EVB and idmr board supportMasahiro Yamada2014-03-10-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it as 1000000 and idmr.h defines it as (50000000 / 64). When compiling these two boards, a warning message is displayed: time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms" [-Wcpp] There are no board maintainers for them so this commit just deletes them. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Jason Jin <Jason.jin@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-03-07-0/+5
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| * | powerpc/t2080rdb: Add T2080PCIe-RDB board supportShengzhou Liu2014-03-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. It works in two mode: standalone mode and PCIe endpoint mode. T2080PCIe-RDB Feature Overview ------------------------------ Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes 16 lanes configuration: - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10) - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3) - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2) - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) - SerDes-2 Lane G-H: to SATA1 & SATA2 IFC/Local Bus: - NOR: 128MB 16-bit NOR flash - NAND: 512MB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 gold-finger - One PCIe x4 connector - One PCIe x2 end-point device (C293 Crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a TF-card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | mips: move CONFIG_MIPS{32, 64} definition to config.mkMasahiro Yamada2014-03-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | ppc4xx: Remove 4xx NAND booting supportStefan Roese2014-03-07-8/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the "normal", non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | arc: arcangel4: set board entry <none> to fix a build errorMasahiro Yamada2014-03-04-2/+2
|/ | | | | | | | There are no source files in board/synopsys/arcangel4/ directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-0/+6
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-24-0/+5
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| | * Add support for B&R KWB MotherboardHannes Petermaier2014-02-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: trini@ti.com
| | * board: Add support for B&R T-Series MotherboardHannes Petermaier2014-02-21-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * am335x: Initial support for Silica Pengwyn boardLothar Felten2014-02-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the Silica Pengwyn board [1] The board is based on a TI AM3354 CPU [2] All jumpers removed it will boot from the SDcard, the console is on UART1 accessible via the FDTI -> USB. The on board NAND flash is supported and can act as boot medium, depending on jumper settings. USB Host, USB Device and Ethernet are also provided but untested. [1] http://www.silica.com/product/silica-pengwyn-board.html [2] http://www.ti.com/product/am3354 Signed-off-by: Lothar Felten <lothar.felten@gmail.com> [trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused spi0_pin_mux from Pengwyn support] Signed-off-by: Tom Rini <trini@ti.com>
| * | board: bcm28155_ap: Add board filesDarwin Rambo2014-02-22-0/+1
| |/ | | | | | | | | | | | | | | Add support for the bcm28155_ap reference board. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-02-25-5/+10
|\ \ | | | | | | | | | | | | | | | | | | With this, fixup a trivial build error of get_effective_memsize needing to be updated in the new board/freescale/p1010rdb/spl.c Signed-off-by: Tom Rini <trini@ti.com>
| * | powerpc/t2081qds: Add T2081 QDS board supportShengzhou Liu2014-02-24-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2081 QDS is a high-performance computing evaluation, development and test platform supporting the T2081 QorIQ Power Architecture processor. T2081QDS board Overview ----------------------- - T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz - 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC) - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving - Ethernet interfaces: - Two on-board 10M/100M/1G bps RGMII ports - Two 10Gbps XFI with on-board SFP+ cage - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card - Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC - SerDes: - 8 lanes up to 10.3125GHz - Supports SGMII, HiGig, XFI, XAUI and Aurora debug, - IFC: - 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA - eSPI: - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) - USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB) - PCIe: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - eSDHC: - Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and voltage translators - I2C: - Four I2C controllers. - UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | boards.cfg: Keep arc entries sortedFabio Estevam2014-02-24-3/+3
| | | | | | | | | | | | | | | | | | | | | Run "tools/reformat.py -i -d '-' -s 8 <boards.cfg >boards0.cfg && mv boards0.cfg boards.cfg" in order to keep arc entries sorted. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit v1.1 at 2024-11-22 05:12:19 +0000