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| * net: gem: Move driver to DMMichal Simek2015-12-07-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | - Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-07-0/+1362
|/ | | | | | | | | | | | | | | The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* rpi: add support for Raspberry Pi ZeroStephen Warren2015-12-05-0/+5
| | | | | | | For U-Boot's purposes, at present all we care about is ensuring there's a model table entry. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* rpi: fix revision scheme parsingStephen Warren2015-12-05-34/+53
| | | | | | | | | | The RPi has two different schemes for encoding board revision values. When adding RPi 2 support, I thought that the conflicting type field values were to be interpreted based on bcm2835-vs-bcm2836. In fact, the scheme bit determines the encoding. The RPi Zero uses the bcm2835 yet uses the new encoding scheme. Fix the code to cater for this correctly. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* rpi: get rid of BCM2835_BOARD_REV_* macrosStephen Warren2015-12-05-19/+23
| | | | | | | | | | | | | | There are two numbering schemes for the RPi revision values; old and new scheme. The values within each scheme overlap. Hence, it doesn't make sense to have absolute/global names for the revision IDs. Get rid of the names and just use the raw revision/type values to set up the array of per-revision data. This change makes most sense when coupled with the next change. However, it's split out so that the mechanical cut/paste is separate from the logic changes for easier review and problem bisection. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* Change e-mail address of Kamil LulkoKamil Lulko2015-12-05-3/+3
| | | | Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-12-04-257/+600
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| * arm: imx6: novena, gw_ventana: Fix use of pfuze100 bit definitionsMarek Vasut2015-12-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following patch changed the PFUZE100 swbst register bit definitions and broke PMIC configuration on multiple boards, at least on the novena and gw_ventana. This patch fixes it. commit 8fa46350a4c7dca7710362f6c871098557b934ad Author: Peng Fan <Peng.Fan@freescale.com> Date: Fri Aug 7 16:43:45 2015 +0800 power: regulator: add pfuze100 support Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Vagrant Cascadian <vagrant@aikidev.net> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Vagrant Cascadian <vagrant@aikidev.net> Reviewed-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Tim Harvey <tharvey@gateworks.com>
| * colibri_vf: Add board_usb_phy_mode functionSanchayan Maity2015-11-25-1/+32
| | | | | | | | | | | | | | | | Add board_usb_phy_mode function for detecting whether a port is being used as host or client using a GPIO. On Colibri Vybrid we provide GPIO 102 for this very same purpose. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
| * cgtqmx6eval: Add SPL supportOtavio Salvador2015-11-25-258/+541
| | | | | | | | | | | | | | | | | | Congatec has several MX6 boards based on quad, dual, dual-lite and solo. Add SPL support so that all the variants can be supported Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPI NOR flash supportOtavio Salvador2015-11-25-0/+29
| | | | | | | | | | | | | | | | | | | | Add SPI NOR support: => sf probe SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* | rockchip: Add basic support for evb-rk3036 boardhuang lin2015-12-01-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-11-30-0/+313
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| * | arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-30-0/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-11-30-124/+1400
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| * | | board/ls2080qds: Fix typo in README for QSGMII riser cardPrabhakar Kushwaha2015-11-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DPMACx to PHY mapping for SGMII is mentioned as QSGMII. So fix typo in README for QSGMII rise card. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Change from ls2085aqds to ls2080aqds] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043ardb: add USB supportGong Qianyu2015-11-30-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-30-0/+1235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-113/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | driver: net: fsl-mc: Create DPAA2 object at run-timePrabhakar Kushwaha2015-11-30-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's DPAA2 ethernet driver depends upon the static DPL for the DPRC, DPNI, DPBP, DPIO objects. Instead of static objects, Create DPNI, DPBP, DPIO objects at run-time. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: ls2085aqds: Print function name during SerDes errorPrabhakar Kushwaha2015-11-30-8/+8
| |/ / | | | | | | | | | | | | | | | | | | | | | Print function name along with SerDes Protocol during SerDes Protocol not supported error. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-11-30-0/+1405
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| * | | arm: socfpga: Repair SoCrates boardMarek Vasut2015-11-30-0/+1405
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board was constantly parasiting on the CV SoCDK, so split it into it's own separate directory. Moreover, the board config was missing important bits, like simple-bus support in SPL, the DRAM configuration was incorrect and the DTS was also missing the pre reloc bits. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Jan Viktorin <viktorin@rehivetech.com>
* | | Merge git://www.denx.de/git/u-boot-ppc4xxTom Rini2015-11-30-1/+4
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| * | | PPC4xx: Create "liebherr" vendor directoryWolfgang Denk2015-11-30-1/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation of some new Liebherr boards to be added soon, a new "liebherr" vendor directory gets created, and the "lwmon5" board directory is moved into this new vendor directory. cc: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | arm: kirkwood: add ZyXEL NSA310S deviceGerald Kerma2015-11-29-0/+260
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add ZyXEL NSA310S 1-Bay Media Server The ZyXEL NSA310S device is a Kirkwood based NAS: - SoC: Marvell 88F6702 1000Mhz - SDRAM memory: 256MB DDR2 400Mhz - Gigabit ethernet: PHY Marvell 88E1318 - Flash memory: 128MB - 1 Power button - 1 Power LED (blue) - 4 Status LED (green) - 1 Copy/Sync button - 1 Reset button - 1 SATA II port - 2 USB 2.0 ports (front and back) - Smart fan Signed-off-by: Gerald Kerma <dreagle@doukki.net> Signed-off-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-11-22-1/+14
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| * | sunxi: Add support for the Lamobo R1 boardJelle de Jong2015-11-22-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lamobo-r1 board, sometimes called the BPI-R1 but not labelled as such on the PCB, is meant as a A20 based router board. As such the board comes with a built-in switch chip giving it 5 gigabit ethernet ports, and it has a large empty area on the pcb with mounting holes which will fit a 2.5 inch harddisk. To complete its networking features it has a Realtek RTL8192CU for WiFi 802.11 b/g/n. The dts file is identical to the one submitted upstream. Signed-off-by: Jelle de Jong <jelledejong@powercraft.nl> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add support for Orangepi Plus and Orangepi PC boardsHans de Goede2015-11-22-0/+2
| | | | | | | | | | | | | | | | | | Add defconfig files for the Orangepi Plus and Orangepi PC. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add H3 DRAM initialization supportJens Kuske2015-11-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Based on existing A23/A33 code and the original H3 boot0. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add basic H3 supportJens Kuske2015-11-22-1/+6
| |/ | | | | | | | | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | vexpress64: use 2nd DRAM bank only on junoRyan Harkin2015-11-21-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models. The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets: commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau <Liviu.Dudau@foss.arm.com> Date: Mon Oct 19 11:08:31 2015 +0100 vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel. Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | vexpress64: compile Juno PCIe conditionallyRyan Harkin2015-11-21-3/+9
| | | | | | | | | | | | | | | | Only compile in PCIe support if the board really uses it. Provide a __weak stub for the init function if e.g. FVP is being built. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | Juno: don't print PCI debug information by defaultAndre Przywara2015-11-21-1/+1
| | | | | | | | | | | | | | | | | | | | On a Juno r1 the PCI controller init routine outputs the rather boring ATR entry information. Do this only with DEBUG defined to avoid cluttering the user's terminal. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
* | tricorder: rewrite tricordereeprom commandAndreas Bießmann2015-11-21-27/+9
| | | | | | | | | | | | | | | | | | | | | | | | This rewrite uses lately promoted eeprom_init(int) function to choose the right I2C bus when writing data to the EEPROM. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* | ARM: dra7x/am57x: Remove pin input/output config from WAKEUP pinsCooper Jr., Franklin2015-11-21-5/+5
| | | | | | | | | | | | | | | | | | | | | | The WAKEUP_X pins are always an input no matter the pinmux mode. However, the 18th bit that typical configures a pin as an input is considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP pin remove any configuration that sets that pin as an input. Since those pins are only inputs remove any output configuration from those pins. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
* | ns16550: unify serial_omapThomas Chou2015-11-21-8/+8
|/ | | | | | | | Unify serial_omap, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+32
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* Drop CONFIG_ISA_KEYBOARDSimon Glass2015-11-19-4/+0
| | | | | | | This option is mentioned but does not do anything. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* input: Support the German keymapSimon Glass2015-11-19-1/+1
| | | | | | | | Add support for the German keymap, taken from i8042.c. This can be selected when the input library it initialised. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* sandbox: add a sandbox timer and basic testThomas Chou2015-11-19-0/+2
| | | | | | | | Add a sandbox timer which get time from host os and a basic test. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
* input: Add the keycode translation tables separatelySimon Glass2015-11-19-0/+1
| | | | | | | | | Require the caller to add the keycode translation tables separately so that it can select which ones to use. In a later patch we will add the option to add German tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* km/powerpc: fix ft_board_setup prototype for km82xx & km83xxValentin Longchamp2015-11-18-2/+2
| | | | Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* powerpc/83xx: add support for kmtegr1 boardValentin Longchamp2015-11-18-0/+1
| | | | | | | | | This board uses the same CPU (8309) as VECT1. The memory however is different since it has NAND Flash, the NOR Flash partitioning is different and of course the FPGAs as well. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Christoph Dietrich <christoph.dietrich@keymile.com>
* board/keymile/km82xx: setting dip_switch 3 and 4 will run bootloaderBagavathiannan Palanisamy2015-11-18-2/+2
| | | | | | | | | | Setting dip_switch 3 and 4 also will run bootloader in COGE3 and COGE6 It is required remove local mgmt IP address, when DIP Switch PIN3 is enabled. DIP Switch 4 also enabled to avoid u-boot update in future for DIP switch enhancements. Signed-off-by: Bagavathiannan Palanisamy <Bagavathiannan.Palanisamy@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* km/powerpc82xx: remove unused functionHolger Brunck2015-11-18-16/+0
| | | | | | | | commit 0a4f88b98 removed the usage of our setports function, but the function itself were not removed. So toss it it's dead code. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* km/powerpc: remove unneeded definesHolger Brunck2015-11-18-9/+3
| | | | | | | | We use CONFIG_OF_LIBFDT and CONFIG_OF_BOARD_SETUP on all our powerpc targets, so there is no need to check these defines within our C code. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* powerpc/82xx/km: add testpin detection for mgcoge3neHolger Brunck2015-11-18-1/+15
| | | | | | | | | On mgcoge3ne we also want to start the test application if the testpin is asserted. But we don't have a full POST test support yet. So simply add a function to read the testpin value. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* powerpc/82xx: make set/get_pin for km82xx more flexibleHolger Brunck2015-11-18-12/+12
| | | | | | | | | The get_pin and set_pin funciton was only used for pins on Port D and therefore the value was hard coded in the function. Enhance this with a parameter, that we are able to use this functions for other ports too. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
generated by cgit v1.1 at 2024-11-09 08:39:36 +0000