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* | | | sunxi: Add support for the Jesurun Q5 boardGábor Nyers2015-03-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Jesurun Q5 has a black plastic casing with the approximate dimensions of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can be extended up to 32GB with a MicroSD card. The external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to power) and an programmable green led. On the board there is also an unpopulated IR receiver and the UART. The devices is equipped with an AXP209 PMU. For more details see: http://linux-sunxi.org/Jesurun_Q5 Signed-off-by: Gábor Nyers <gnyers@opensuse.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | sunxi: Make CONFIG_DRAM_TPR3 apply to sun[57]iAdam Sampson2015-03-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tpr3 (timing skew) parameter is used in all supported versions of the sunxi DRAM controller, but it was only enabled for sun4i in 47e3501a76894f4ba08bc61f33774bd5d39ff464. Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | armv8/vexpress64: make multientry conditionalLinus Walleij2015-03-09-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-03-05-146/+1045
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| * | | | arm: socfpga: Add Altera Arria V DK supportMarek Vasut2015-03-04-0/+928
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Zap board_early_init_f()Marek Vasut2015-03-04-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zap this unused empty function, no point in having it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Zap checkboard()Marek Vasut2015-03-04-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since all boards now have a DT, instead of hard-coding the board name into the U-Boot binary, read the board name from DT "model" property. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Drop cyclone5 suffix from board file nameMarek Vasut2015-03-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file will contain Arria 5 support as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Sync Cyclone V DK PLL configurationMarek Vasut2015-03-04-23/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). NOTE: This change is useless until we get proper SPL support, at which point this will likely need further rework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Sync Cyclone V DK pinmux configurationMarek Vasut2015-03-04-101/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | | arm: socfpga: Minor coding style fixMarek Vasut2015-03-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace multiple spaces with a single tab. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-03-05-44/+880
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| * | | | | SECURE_BOOT : enable esbc_validate command for powerpc and arm platforms.gaurav rana2015-03-05-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | esbc_validate command uses various IP Blocks: Security Monitor, CAAM block and SFP registers. Hence the respective CONFIG's are enabled. Apart from these CONFIG_SHA_PROG_HW_ACCEL and CONFIG_RSA are also enabled. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | SECURE BOOT: Add command for validation of imagesgaurav rana2015-03-05-0/+874
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. esbc_validate command is meant for validating header and signature of images (Boot Script and ESBC uboot client). SHA-256 and RSA operations are performed using SEC block in HW. This command works on both PBL based and Non PBL based Freescale platforms. Command usage: esbc_validate img_hdr_addr [pub_key_hash] 2. ESBC uboot client can be linux. Additionally, rootfs and device tree blob can also be signed. 3. In the event of header or signature failure in validation, ITS and ITF bits determine further course of action. 4. In case of soft failure, appropriate error is dumped on console. 5. In case of hard failure, SoC is issued RESET REQUEST after dumping error on the console. 6. KEY REVOCATION Feature: QorIQ platforms like B4/T4 have support of srk key table and key revocation in ISBC code in Silicon. The srk key table allows the user to have a key table with multiple keys and revoke any key in case of particular key gets compromised. In case the ISBC code uses the key revocation and srk key table to verify the u-boot code, the subsequent chain of trust should also use the same. 6. ISBC KEY EXTENSION Feature: This feature allows large number of keys to be used for esbc validation of images. A set of public keys is being signed and validated by ISBC which can be further used for esbc validation of images. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | mpc85xx/t104xrdb : remove raw timing parametervijay rai2015-03-05-44/+0
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board uses DDR DIMM. Reading SPD provides more flexibility. Raw timing parameter code should be removed after debugging. Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | vexpress64: juno: support SMC9118 ethernetLinus Walleij2015-03-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This configures the Juno board to enable ethernet using the SMSC9118 ethernet controller found in the board. Tested by TFTP-booting a kernel over ethernet. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | | m68k: add amcore board supportangelo@sysam.it2015-03-05-0/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Sysam Amcore m68k-based board support. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
* | | | | Adding Support for BAV335x boardsGilles Gameiro2015-03-05-0/+883
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* | | | | omap3: add support for QUIPOS Cairo board.Albert ARIBAUD \(3ADEV\)2015-03-05-0/+449
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends OMAP3 support for AM/DM37xx and introduces the AM3703-based Quipos Cairo board. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | | board/BuR/kwb: Support modify bootcmd through reset-controllerHannes Petermaier2015-03-05-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some cases it is necessary to modify temporaly the bootcommand. This can be done by writing into the Scratchregister a specific value: * 0xCC - modify bootcmd "run netboot" * 0xCD - modify bootcmd "run netscript" * 0xCE - modify bootcmd "run mmcboot" the environment in flash is NOT overwritten. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/kwb: Form a bootline for vxWorksHannes Petermaier2015-03-05-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vxWorks needs several parameters which are set by the bootloader und his environment. So we form a vxWorks bootline and pass the result to vxWorks on a predefined address. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/kwb: switch to board HW-Rev3Hannes Petermaier2015-03-05-61/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board has been redesigned, therefore we need from now other I/O Pins to mux and handle. Older boards aren't supported from now anymore. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/tseries: cosmetic changesHannes Petermaier2015-03-05-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove unnary '#define ETHLED_ORANGE (96+16) /* GPIO3_16 */' Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/tseries: Chg Pinmux - enable UART1 pinsHannes Petermaier2015-03-05-0/+8
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/tseries: Chg pinmux - use free NAND Pins in non NAND-config as GPIOHannes Petermaier2015-03-05-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On boards were we have no NAND-flash soldered, we want to use those free pins as regular gpio. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/tseries: Change pinmux for GPIO2_28 from GPIO to PWM-TimeroutputHannes Petermaier2015-03-05-3/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/tseries: Enable HW-WatchdogHannes Petermaier2015-03-05-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/common: try to setup cpsw mac-address from the devicetreeHannes Petermaier2015-03-05-10/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since we have a dtb blob programmed on the board we try to setup the cpsw interface with the programmed mac. If this method fails, we fall back to the device-fuses. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | board/BuR/common: Take usage of am335x LCD-DisplayHannes Petermaier2015-03-05-19/+454
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a summary screen to the lcd. Values are taken from environment and or devicetree blob. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-03-05-33/+267
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| * | | mx5: fix get_reset_causeStefano Babic2015-03-05-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d9f43c8f5c1d7ed27c99a06be85a4bb64b2c73fb sets get_reset_cause() as static, but this conflicts with mx5 where its prototype is in sys_proto.h. Drop it from sys_proto.h and drop print_cpuinfo from mx53_loco, factorizing the call for this board. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org>
| * | | warp: Add USB Mass Storage supportFabio Estevam2015-03-02-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With UMS support we are able to flash the eMMC from U-boot, which is very convenient. Add UMS support to make the eMMC flashing process easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | mx6slevk: Provide a proper pad configuration for OTG1_ID pinFabio Estevam2015-03-02-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the same pad configuration as done in the kernel so that OTG1_ID pin can properly work in device mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx25pdk: Turn on the LCD supplyFabio Estevam2015-03-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there is no support for MC34704 PMIC in the mainline kernel. Turn on the LCD supply via bootloader for the time being, so that we could use the LCD in the kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-03-02-2617/+1902
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| * | | | warp: Add initial WaRP Board supportOtavio Salvador2015-02-23-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The WaRP Board is a Wearable Reference Plaform. The board features: - Freescale i.MX6 SoloLite processor with 512MB of RAM - Freescale FXOS8700CQ 6-axis Xtrinsic sensor - Freescale Kinetis KL16 MCU - Freescale Xtrinsic MMA955xL intelligent motion sensing platform The board implements a hybrid architecture to address the evolving needs of the wearables market. The platform consists of a main board and an example daughtercard with the ability to add additional daughtercards for different usage models. For more information about the project, visit: http://www.warpboard.org/ Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | | imx:mx6slevk implement power init boardPeng Fan2015-02-23-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement power_init_board and related I2C interface configuration. After adding this, uboot can successfully detect and configure pmic. " U-Boot 2015.01-00281-ge29eddf (Feb 12 2015 - 09:24:01) CPU: Freescale i.MX6SL rev1.0 at 396 MHz Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 " Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | | | board: tbs2910: Gate clock when switching async clock muxesSoeren Moch2015-02-23-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the i.MX6Q Reference Manual, clocks must be gated when switching input clocks of async clock muxes. So use clock gates. Avoid ldb_di0_ipu clock, because there is no clock gate for this signal. There have never been any complaints about problems with the old code, but the new approach is in line with the recommendations in the manual. Signed-off-by: Soeren Moch <smoch@web.de>
| * | | | nitrogen6x: set environment variable reset_causeEric Nelson2015-02-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-02-13-9620/+1624
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| * | | | | imx:mx6 set normal APS and standby PFM modePeng Fan2015-02-11-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To normal mode, use APS switching mode. To standy mode, use PFM switching mode. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * | | | | pmic:pfuze implement pmic_mode_initPeng Fan2015-02-11-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to implement pmic_mode_init function, and add prototype in header file. This function is to set switching mode for pmic buck regulators to improve system efficiency. Mode: OFF: The regulator is switched off and the output voltage is discharged. PFM: In this mode, the regulator is always in PFM mode, which is useful at light loads for optimized efficiency. PWM: In this mode, the regulator is always in PWM mode operation regardless of load conditions. APS: In this mode, the regulator moves automatically between pulse skipping mode and PWM mode depending on load conditions. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | | | | | dm: tegra: Enable driver model in SPL and adjust the GPIO driverSimon Glass2015-03-04-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the full driver model GPIO and serial drivers in SPL now that these are supported. Since device tree is not available they will use platform data. Remove the special SPL GPIO function as it is no longer needed. This is all in one commit to maintain bisectability. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | | | Odroid U3: use common code for dram reservationPrzemyslaw Marczak2015-03-04-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit removes the dram reservation from board file, because it is done in a common code. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | | board: samsung: reserve memory for the secure firmwarePrzemyslaw Marczak2015-03-04-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since more than one board requires memory reservation for the secure firmware, the reservation code can be made in a common code. Now, to reserve some part of the the last bank, board config should define: - CONFIG_TZSW_RESERVED_DRAM - len in bytes - CONFIG_NR_DRAM_BANKS - number of memory banks Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Hyungwon Hwang <human.hwang@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | | samsung: board: fix: Define loop iterator as an unsigned int to suppress gcc ↵Łukasz Majewski2015-03-04-2/+2
| |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 4.8 warning This patch suppress following warning: board/samsung/common/board.c:95:32: warning: iteration 4u invokes undefined behavior [-Waggressive-loop-optimizations] addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); ^ board/samsung/common/board.c:94:2: note: containing loop about possible signed integer overflow at gcc 4.8.2 (odroid board) Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | mpc837xerdb: "fix Calling __hwconfig without a buffer" warningSinan Akman2015-03-02-1/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sinan Akman <sinan@writeme.com>
* | | | | Merge branch 'xnext/zynqmp' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-03-02-0/+119
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| * | | | | arm64: Add Xilinx ZynqMP supportMichal Simek2015-03-02-0/+119
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic Xilinx ZynqMP arm64 support. Serial and SD is supported. It supports emulation platfrom ep108 and QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | | MAINTAINERS, git-mailrc: Update my email addressTom Rini2015-03-02-14/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
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