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* ARM: AM43xx: clocks: Add dpll and clock dataLokesh Vutla2013-08-15-1/+2
| | | | | | Add dpll and clock data for AM43xx Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: Add Board filesLokesh Vutla2013-08-15-0/+138
| | | | | | Add board specific information for AM43xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM33xx: Move s_init to a common placeHeiko Schocher2013-08-15-208/+56
| | | | | | | | | | | | s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup clocks layerLokesh Vutla2013-08-15-17/+19
| | | | | | | | | | | Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup dplls dataLokesh Vutla2013-08-15-0/+46
| | | | | | | | | | | | | Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* gpio: omap5-uevm: Configure the tca6424 gpio expanderDan Murphy2013-07-30-0/+24
| | | | | | | Configure the tca6424 gpio expander This allows use of the debug and tri color LEDs. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* board/ti/am335x/README: Document NOR programmingTom Rini2013-07-30-0/+23
| | | | | | | The Beaglebone White may be populated with a memory cape that has a NOR module. Document how to program it. Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add support to boot from NOR.Steve Kipisz2013-07-30-7/+151
| | | | | | | | | | | | | | | | | | NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR. We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c with TI81xx checks as at this time U-Boot does not discard unused sections in the main build and this code relies on functions specific to (and only provided in) ti81xx-related code. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add support for the NOR module on the memory capeSteve Kipisz2013-07-30-0/+66
| | | | | | | | | | | This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Rework board_is_foo() checksTom Rini2013-07-30-58/+63
| | | | | | | | | | We rework the various board_is_foo() checks to take a pointer to struct am335x_baseboard_id rather than using a local copy in board.c. This allows us to make use of the same checks in mux.c as well as fixing problems when this code could be running from read-only memory. Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
* board/ti/am335x/README: Document NAND programmingTom Rini2013-07-30-0/+24
| | | | | | | The AM335x GP EVM ships with NAND. Document programming of the chip including the redundant locations that the ROM will check. Signed-off-by: Tom Rini <trini@ti.com>
* beagleboard: remove RevB support for BeagleBoard XmNishanth Menon2013-07-26-23/+8
| | | | | | | | | | | | As reported in http://marc.info/?l=u-boot&m=137358037827735&w=2 There is no need for the "xMB" variant, as the gpio pins used for identification where never changed from the xMA when the newer silcon was used for the xMB, So rename XM A revision as AB revision and report accordingly Reported-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7xx: Add CPSW and MDIO pinmux supportMugunthan V N2013-07-26-0/+14
| | | | | | Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: DRA7xx: Add CPSW support to DRA7xx EVMMugunthan V N2013-07-26-5/+145
| | | | | | Adding support for CPSW Ethernet support found in DRA7xx EVM Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: remove hard coding bd ram for cpswMugunthan V N2013-07-26-0/+2
| | | | | | | BD ram address may vary in various SOC, so removing the hardcoding and passing the same information through platform data Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x_evm: Add basic READMETom Rini2013-07-26-0/+113
| | | | | | | | | Add a README for the family of boards the am335x_evm covers, and include instructions on preparing and using falcon mode, for various media. Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* da850evm: Use clrbits function with correct endianessChristian Riesch2013-07-26-11/+3
| | | | | | | | | | | | The current code uses clrbits_be32 which is incorrect since we are on a little endian machine here. This patch fixes this issue and also removes some unnecessary code: Reading the current GPIO bank state is not required if we are using the SET and CLEAR GPIO registers for setting/clearing bits. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
* Merge branch 'u-boot/master' into u-boot-arm/masterAlbert ARIBAUD2013-07-25-37021/+2552
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| * Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-12/+27
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| | * nds32: Convert Makefiles to use COBJS-y styleken kuo2013-07-25-8/+8
| | | | | | | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| | * nds32: Enable two banks of SDRAM on Andes boardken kuo2013-07-24-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | The original adp-ag101/adp-ag101p initialize only one bank(64MB) by default at boot time, but it is not enough for some application, so increasing to two banks(128M). Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| | * nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_initGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to improper external function declaration, building U-Boot for the adp-ag102 board shows this warning: adp-ag102.c: In function 'pci_init_board': adp-ag102.c:95: warning: function declaration isn't a prototype Include the 'faraday/ftpci100.h' header which provides the proper declaration and remove the local declaration to get rid of the warning. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | qemu-malta: Update for SPDX license identifiersTom Rini2013-07-25-23/+3
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-07-25-0/+165
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
| | * | MIPS: qemu-malta: bring up ethernetGabor Juhos2013-07-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| | * | MIPS: qemu-malta: add PCI supportGabor Juhos2013-07-24-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| | * | MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| | * | MIPS: qemu-malta: add reset supportGabor Juhos2013-07-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| | * | MIPS: qemu-malta: add support for emulated MIPS Malta boardGabor Juhos2013-07-24-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-690/+117
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| | * | vf610: Add I2C support for Vybrid VF610 platformAlison Wang2013-07-23-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for Vybrid VF610 platform and adds I2C0 support to VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com>
| | * | i2c, ppc4xx_i2c: switch to new multibus/multiadapter supportDirk Eibach2013-07-23-642/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
| | * | tegra: i2c: Enable new CONFIG_SYS_I2C frameworkSimon Glass2013-07-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Schocher <hs@denx.de>
| | * | i2c, multibus, keymile: get rid of EEprom_ivm envvariableHeiko Schocher2013-07-23-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as the keymile boards use now the new i2c multibus/multiadapter framework, remove the EEprom_ivm Environmentvar, as not longer needed. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Holger Brunck <holger.brunck@keymile.com> Tested-By: Holger Brunck <holger.brunck@keymile.com>
| | * | i2c, fsl_i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-43/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| | * | i2c, soft-i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-34/+37
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | - added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-36321/+2265
| |/ | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* | socfpga: Move board/socfpga_cyclone5 to board/socfpgaDinh Nguyen2013-07-25-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the SOCFPGA platform will include support for Cyclone V and Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to be more generic. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> v2: - Add Reviewed-by: Pavel Machek - Cc: Tom Rini
* | ARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_RRob Herring2013-07-25-0/+2
| | | | | | | | | | | | Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: highbank: setup peripherals based on power domain statusRob Herring2013-07-25-2/+29
|/ | | | | | | | Accessing powered down peripherals will hang the bus, so check power domain status before initializing SATA and fixup the FDT to disable unused peripherals. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* arm: at91sam9n12: change EBI IO to high drive modeBo Shen2013-07-22-1/+1
| | | | | | | | | | | | As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12 and share the lower 8 bits data line. If use low drive of the data line, it will cause DDR data access corrupt in lower address, so change the data line to high drive mode This will fix the Linux kernel boot issue when use Lower address Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ddr cfg: DRAM_RESET needs 0x00020030Troy Kisky2013-07-20-1/+1
| | | | | | | | | | | | | | | | | The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mpc85xx: Add gdsys ControlCenter Digital boardDirk Eibach2013-07-16-0/+2171
| | | | | | | | | | | | | | | | | The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2x GbE - Lattice ECP3 FPGA connected via PCIe - mSATA RAID1 - USB host - DisplayPort video output - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
* arm:samsung:trats:fix: Restore proper orientation of TRATS's LCD panelŁukasz Majewski2013-07-16-9/+1
| | | | | | | | | | | | | | | | | | | | | | | Before setting: mipi_lcd_device.reverse_panel = 1, the Trats's LCD panel was flipped by 180 degrees. The flip was caused by following change: Exynos: Change get_timer() to work correctly SHA1: 3d00c0cb96ff93a929700b80d89cb905e5ab5315 This commit fixed udelay(), which is necessary (due to HW LCD controller oddity) for mipi-dsi correct operation. As a result the display orientation has been switched. As a follow up, the hwrevision() function has been removed, since it was used only in this particular place. Test HW: Trats Exynos4210 rev 0. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* PPC MPC83xx: Fix MPC8323ERDB build warningWolfgang Denk2013-07-15-1/+5
| | | | | | | | | | | | Fix: mpc8323erdb.c: In function 'mac_read_from_eeprom': mpc8323erdb.c:198:3: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Timur Tabi <timur@tabi.org> cc: Kim Phillips <kim.phillips@freescale.com>
* Revert "MIPS: Jz4740: Add qi_lb60 board support"Tom Rini2013-07-15-175/+0
| | | | | | | | | | The files board/qi/qi_lb60/qi_lb60.c and include/configs/qi_lb60.h were licensed under the GPL v3 or later, and not v2 or later. As this is incompatible with the project, revert this board support until the responsible parties are available to re-license (if so desired) under GPL v2. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-4311/+1060
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: tegra: enable LCD panel on VentanaStephen Warren2013-07-11-0/+32
| | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: enable LCD panel on HarmonyStephen Warren2013-07-11-0/+39
| | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-0/+1
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-01 00:44:33 +0000