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* LaCie/common: add support for the CPLD GPIO busSimon Guinot2013-06-20-0/+74
| | | | | | | | | | | | This patch adds support for the CPLD GPIO bus found on some LaCie boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO bus exposes two registers (address and data). Each of this register is made up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that the registers have been updated. Mostly this bus is used to configure the LEDs on LaCie boards. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* net2big_v2: initialize I2C fan at startupSimon Guinot2013-06-20-1/+58
| | | | | | | | This patch ensures minimal cooling for the net2big_v2 by automatically starting the I2C fan (GMT G762) at low speed (2800 RPM). Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-167/+90
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| * arm: omap4: panda: Fix checkpatch on panda fileDan Murphy2013-06-18-13/+13
| | | | | | | | | | | | | | | | Fix the checkpatch warning on the panda.c file for leading spaces. Fix the CHECK warnings on the panda.c file for parenthesis alignment. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * arm: omap4: panda: Add reading of the board revisionDan Murphy2013-06-18-5/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect if we are running on a panda revision A1-A6, or an ES panda board. This can be done by reading the level of GPIOs and checking the processor revisions. This should result in: Panda 4430: GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 GPIO171, GPIO101, GPIO182: 1 0 1 => A6 Panda ES: GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 Set the board name appropriately for the board revision that is detected. Update the findfdt macro to load the a4 device tree binary. Signed-off-by: Dan Murphy <dmurphy@ti.com> [trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and formatting for that] Signed-off-by: Tom Rini <trini@ti.com>
| * arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-85/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
| * arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-64/+0
| | | | | | | | | | | | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-379/+587
|\ \ | |/ |/| | | | | Conflicts: spl/Makefile
| * SMDK5250: Enable EMMC bootingAmar2013-06-13-13/+74
| | | | | | | | | | | | | | This patch adds support for EMMC booting on SMDK5250. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDTAmar2013-06-13-167/+483
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables and initialises DWMMC for SMDK5250. Supports both FDT and non-FDT. This patch creates a new file 'exynos5-dt.c' meant for FDT support. exynos5-dt.c: This file shall contain all code which supports FDT. Any addition of FDT support for any module needs to be added in this file. smdk5250.c: This file shall contain the code which supports non-FDT. version. Any addition of non-FDT support for any module needs to be added in this file. May be, the file smdk5250.c can be removed in near future when non-FDT is not required. The Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration. NOTE: Please note that all additions corresponding to FDT need to be added into the file exynos5-dt.c. At same time if non-FDT support is required then add the corresponding updations into smdk5250.c. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: FDT: Add DWMMC device node dataAmar2013-06-13-0/+24
| | | | | | | | | | | | | | | | | | | | | | This patch adds DWMMC device node data for exynos5. This patch also adds binding file for DWMMC device node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Update origen and smdkv310 to use common tzpc_initInderpal Singh2013-06-04-125/+4
| | | | | | | | | | | | Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: update tzpc to make it common for exynos4 and exynos5Inderpal Singh2013-06-04-0/+2
| | | | | | | | | | | | | | | | | | | | This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: move tzpc_init to armv7/exynosInderpal Singh2013-06-04-74/+0
| | | | | | | | | | | | | | | | | | | | | | tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it. Also update the smdk5250 Makefile and config file. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arm: pxa: Add support for ICP DAS LP-8x4xSergey Yanovich2013-06-12-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-by: Sergey Yanovich <ynvich@gmail.com> Series-to: u-boot Series-cc: marex
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-10-2021/+102
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| * | arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish2013-06-10-131/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
| * | arm: Remove OMAP2420H4 and all omap24xx supportTom Rini2013-06-10-1874/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
| * | da830: add MMC supportVishwanathrao Badarkhe, Manish2013-06-10-0/+48
| | | | | | | | | | | | | | | | | | | | | Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
| * | ARM: DRA7xx: Update pinmux dataLokesh Vutla2013-06-10-14/+24
| | | | | | | | | | | | | | | | | | | | | Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
| * | ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla2013-06-10-5/+5
| | | | | | | | | | | | | | | | | | | | | To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: OMAP4+: Cleanup header filesLokesh Vutla2013-06-10-18/+30
| | | | | | | | | | | | | | | | | | | | | After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes2013-06-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
* | | arm/km: make local functions staticHolger Brunck2013-06-10-2/+2
|/ / | | | | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-08-4/+951
|\ \ | | | | | | | | | | | | Conflicts: drivers/serial/Makefile
| * | vf610twr: Drop unneeded 'status' variableFabio Estevam2013-06-06-4/+1
| | | | | | | | | | | | | | | | | | | | | No need to use the 'status' variable, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
| * | Add support for Congatec Conga-QEVAl boardSARTRE Leo2013-06-04-0/+238
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | wandboard: Enable HDMI splashscreenFabio Estevam2013-06-03-0/+98
| | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signalAndrew Gabbasov2013-06-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
| * | mx6qsabreauto: Add Port Expander resetRenato Frias2013-06-03-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | There are 3 IO expanders on the mx6qsabreauto all reset by the same GPIO, just set it to high to use the IO. Signed-off-by: Renato Frias <b13784@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mx6qsabreauto: Add i2c to mx6qsabreauto boardRenato Frias2013-06-03-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by: Renato Frias <b13784@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | arm: vf610: Add basic support for Vybrid VF610TWR boardAlison Wang2013-06-03-0/+482
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | wandboard: fix typo in READMELuka Perkov2013-05-16-2/+2
| | | | | | | | | | | | | | | | | | Fix typo in wandboard README file. Signed-off-by: Luka Perkov <luka@openwrt.org>
| * | mx23evk: Add splash screen supportFabio Estevam2013-05-16-0/+38
| | | | | | | | | | | | | | | | | | Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx28evk: Add splash screen supportFabio Estevam2013-05-16-0/+39
| | | | | | | | | | | | | | | | | | Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini2013-06-05-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | tx25: copy SPL directly, not using relocate_code.Albert ARIBAUD2013-05-30-1/+15
| | | | | | | | | | | | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
* | | mx31pdk: copy SPL directly, not using relocate_code.Albert ARIBAUD2013-05-30-1/+15
| | | | | | | | | | | | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-30-1980/+1255
|\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
| * | | powerpc/b4860qds: Add LAW Target ID and Create LAW entry for MapleShaveta Leekha2013-05-24-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/p5040: fix mdio mux for 10G portShaohui Xie2013-05-24-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current driver of p5040 assumes 10G port follows 1G port DTSEC5 in eth port enum structure, it will assign mdio mux depend on this assumption. This is not true with Fman V3, which added more 1G ports after port DTSEC5 in eth port enum structure, then 10G ports on p5040 will have wrong mdio mux. So we use dynamic index for 10G ports instead of hardcoded enum value when doing mdio mux for 10G ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/p2041: fix serdes reference clock frequency display for PC boardShaohui Xie2013-05-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PC board has different serdes clock setting with PB board, it uses same serdes frequency setting on bank2 as on bank1. PC board can be distingushed from PB board by checking CPLD version, if running on PC board, then fix the serdes reference clock frequency of bank2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/b4860: fix for Serdes connectivity to SFP'sShaveta Leekha2013-05-24-12/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Crossbar switches were wrongly programmed to route the CPRI lanes to SFP as the connectivity table was not correct. Modified it correctly for SFPs connections. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/t4240qds: fix PHY reset timeout issueShengzhou Liu2013-05-24-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QSGMII card has different PHY address against previous SGMII card. We check the type of card in slots and set correct PHY address to avoid complainning "PHY reset timed out" during u-boot booting up. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/t4qds: Add SW7[4] in the DIP switch displayYork Sun2013-05-24-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SW7[4] is the new bit which controls the mapping of eMMC vs SDHC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | Enable XAUI interface for B4860QDSSuresh Gupta2013-05-24-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32MStephen George2013-05-24-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Debug trace buffers are memory mapped in DCSR space beyond 4M. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/p5040: enable PBL tool supportShaohui Xie2013-05-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/t4qds: use clock measurement for sysclk and ddr clockEd Swarthout2013-05-24-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use QIXIS measurement registers to obtain sysclk and ddr clock. This allows using non-standard clock speeds, set by directly writing to clock chip or store the values in qixis clock data eeprom. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/qixis: add clock measurement registersEd Swarthout2013-05-24-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QIXIS includes frequency measurement functions for each major processor clock input. After reset (and after clocks are stable), QIXIS measures the clocks against a reference frequency and stores the results in CLK_FREQ registers. A base register supplies a multiplier which allows directly obtaining the measured value, without requiring knowledge of the target system or QIXIS core frequency. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-11-07 14:49:28 +0000