summaryrefslogtreecommitdiff
path: root/board
Commit message (Collapse)AuthorAgeLines
* exynos: Add common board code for exynos5 boards that use device treeSimon Glass2015-08-05-0/+363
| | | | | | | | | | Some boards use device tree for almost all board-specific configuration. They therefore do not need their own separate board code, but can all use the same version. Add a common version of the board code. It uses the PMIC, regulator and video bridge uclasses. This will support smdk5250, smdk5420, snow, spring, pit and pi. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-08-05-16/+148
|\
| * x86: qemu: Support operation as an EFI payloadSimon Glass2015-08-05-2/+3
| | | | | | | | | | | | | | | | | | Disable a few things which interfere with the EFI init. This allows QEMU to to boot into EFI, load a U-Boot payload then boot to the U-Boot prompt. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: baytrail: Support operation as an EFI payloadSimon Glass2015-08-05-2/+3
| | | | | | | | | | | | | | | | | | Disable a few things which interfere with the EFI init. This allows the Minnowboard MAX to boot into EFI, load a U-Boot payload then boot to the U-Boot prompt. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Add EFI board codeBen Stoltz2015-08-05-0/+65
| | | | | | | | | | | | | | | | | | | | Add support for the efi-x86 board, which supports running U-Boot as an EFI 32-bit application. Signed-off-by: Ben Stoltz <stoltz@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Add Intel Bayley Bay board supportBin Meng2015-08-05-0/+77
| | | | | | | | | | | | | | | | Intel Bayley Bay board is a BayTrail based board. Add this board with existing baytrail fsp support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: minnowmax: Remove smsc47x superio codesBin Meng2015-08-05-12/+0
| | | | | | | | | | | | | | | | | | On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated into the SoC which is enabled by the FSP. Remove the smsc47x superio initialization codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | sunxi: Drop our own copy of the USB_KEYBOARD optionsHans de Goede2015-08-05-7/+0
| | | | | | | | | | | | | | USB_KEYBOARD is now defined in drivers/usb/Kconfig, drop our own duplicate definition. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | sunxi: usb: USB_MUSB_SUNXI move to musb-new KconfigPaul Kocialkowski2015-08-05-9/+0
| | | | | | | | | | | | | | | | | | | | | | Now that the musb-new driver has a Kconfig, we can move Kconfig options to enable controllers to it, so that it's easier in e.g. menuconfig. In addition, this allows declaring support for USB_MUSB_HOST/GADGET in defconfigs instead of the USB_MUSB_SUNXI controller, that will get selected automatically when needed. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSBPaul Kocialkowski2015-08-05-18/+18
|/ | | | | | | | | USB-related options are usually prefixed with CONFIG_USB and platform-specific adaptation for the MUSB controller already have a CONFIG_USB_MUSB prefix, so this switches all MUSB-related options to a CONFIG_USB_MUSB prefix, for consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* armv7/ls1021a: allow OCRAM access permission as R/W in SPLAlison Wang2015-08-03-171/+184
| | | | | | | | | On LS1021A Rev2.0, OCRAM's security level needs to be changed to non-secure access for SD boot. This patch will allow OCRAM access permission as R/W in SPL. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv7/ls1021atwr: program the regulator for deep sleepchenhui zhao2015-08-03-0/+34
| | | | | | | | Program the external regulator to switch off voltage in deep sleep. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv7/ls1021atwr: added deep sleep support in ubootTang Yuantian2015-08-03-3/+65
| | | | | | Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-08-02-128/+1707
|\
| * imx: mx6ul_14x14_evk add basic board supportPeng Fan2015-08-02-0/+663
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Boot Log: U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device Reset cause: POR Board: MX6UL 14x14 EVK I2C: ready DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * arm: mx6: cm-fx6: setup hdmi only on hdmi enableNikita Kiryanov2015-08-02-6/+3
| | | | | | | | | | | | | | | | | | Refactor display code to only setup hdmi if do_enable_hdmi() is invoked. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: add support for displaytype env varNikita Kiryanov2015-08-02-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for selecting display preset using the environment variable "displaytype". This is a preparation for future merging of compulab omap3_display.c display selection code with the cm-fx6 display selection code. The "panel" environment variable is retained for backwards compatibility. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: make it possible to not init displayNikita Kiryanov2015-08-02-24/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a cm-fx6 specific board_video_skip() to provide the option to not initialize the display. The new function does not init display if the environment variable "panel" is not defined, or if it is set to an unsupported value. Collateral changes: - Don't use the global displays array (it's CONFIG_IMX_VIDEO_SKIP specific). - Don't use detect_hdmi(), since env controlled init makes it unnecessary. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: cm-fx6: map HDMI to IPU1 DI0 explicitlyNikita Kiryanov2015-08-02-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not explicitly assign the display to an IPU interface. Instead, it relies on the power-on default of DI0. Since the kernel reassigns HDMI display to DI1, after a warm reset the HDMI display no longer works in U-Boot. Fix this by explicitly assigning HDMI to IPU1 DI0 in U-Boot. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board supportPeng Fan2015-08-02-7/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add DDR script for mx6qpsabreauto board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Boot Log: U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800) CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Board: MX6Q-Sabreauto revA I2C: ready DRAM: 2 GiB PMIC: PFUZE100 ID=0x10 Flash: 32 MiB NAND: 0 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment No panel detected: default to HDMI Display: HDMI (1024x768) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Note: In this patch, we still add a new config mx6qpsabreauto_config, since SPL is not supported now, and IMX_CONFIG is needed at build time, so add this config. Future, when SPL is converted, this config can be removed. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: mx6sabresd/sabreauto runtime setting fdt_filePeng Fan2015-08-02-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Detect the SOC and board variant at runtime and change the dtb name, but not hardcoding the fdt_file env variable. Take the following patch as a reference. Íd58699b157df75f1aa0b363ea9c21add21a0c "mx6cuboxi: Load the correct 'fdtfile' variable" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * cgtqmx6eval: Align DCD settings with Congatec's U-bootOtavio Salvador2015-07-26-77/+51
| | | | | | | | | | | | | | Use the same DCD settings from Congatec's U-boot tree for the P/N 016113 card. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Add SATA supportOtavio Salvador2015-07-26-0/+5
| | | | | | | | | | | | Add SATA support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Add splash screen supportOtavio Salvador2015-07-26-0/+173
| | | | | | | | | | | | Add LVDS and HDMI support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Add USB supportOtavio Salvador2015-07-26-0/+44
| | | | | | | | | | | | Add USB support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Add PMIC supportOtavio Salvador2015-07-26-0/+85
| | | | | | | | | | | | | | | | cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2. Add support for it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Add ESDHC3 supportOtavio Salvador2015-07-26-1/+21
| | | | | | | | | | | | | | | | cgtqmx6eval has an eMMC connected to ESDHC3. Add support for it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Fit into single linesOtavio Salvador2015-07-26-4/+2
| | | | | | | | | | | | There is no need to use multiple lines when they fit into a single line. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Improve the error handlingOtavio Salvador2015-07-26-3/+7
| | | | | | | | | | | | | | | | Perfoming an OR operation on the error is not a good approach. Return the error immediately for each ESDHC instance instead. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * cgtqmx6eval: Staticize when possibleOtavio Salvador2015-07-26-4/+4
| | | | | | | | | | | | Declare 'static' when possible. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * mx6sxsabresd: Use 'int' for return valuesFabio Estevam2015-07-26-1/+2
| | | | | | | | | | | | | | | | | | | | The variable 'ret' is used to store the value returned by pfuze_mode_init(), so it should be of type 'int' instead of 'unsigned int' in order to correctly handle negative numbers. Fix the variable type. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sabresd: Use 'int' for return valuesFabio Estevam2015-07-26-1/+2
| | | | | | | | | | | | | | | | | | | | The variable 'ret' is used to store the value returned by pfuze_mode_init(), so it should of type 'int' instead of 'unsigned int' in order to correctly handle negative numbers. Fix the variable type. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Add MAX77696 supportFabio Estevam2015-07-26-0/+50
| | | | | | | | | | | | | | | | Warp has a MAX77696 PMIC connected via I2C1 bus. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: mx6: tqma6: Add WRU-IV baseboard for the TQMa6 SoMStefan Roese2015-07-26-0/+352
| | | | | | | | | | | | | | | | | | This patch adds support for the "OHB System AG" baseboard with is equipped with the TQMa6S SoM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-07-17-6/+22
| |\
| * | imx: mx6 remove duplicated enable_cspi_clockPeng Fan2015-07-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_spi_clock does the same thing with enable_cspi_clock, so remove enable_cspi_clock. Remove enable_cspi_clock prototype in header file convert cm_fx6/spl.c to use enable_spi_clk Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-07-31-71/+367
|\ \ \
| * | | powerpc/T104xRDB: Remove vbank check redundant codePriyanka Jain2015-07-31-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sw variable in checkboard function is storing vbank value which can only take 3-bit value. So check of sw value for if greater than 7 is redundant. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t1023rdb: eMMC boot without external SD cardShengzhou Liu2015-07-31-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC has no CD and WP pins, it needs to add board-specific board_mmc_getcd() and board_mmc_getwp() in SPL to support eMMC boot without external SD card inserted. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t1023rdb: add support for T1023RDB RevCShengzhou Liu2015-07-31-46/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for NOR flash and GPIO/I2C switch control on RevC. - NOR support - bank0/bank4 switch - SD/eMMC switch - board version Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040Aneesh Bansal2015-07-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal2015-07-31-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t104x, t102x: Update CPC debug register value in PBI commandsPriyanka Jain2015-07-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PBI command in pbi_cfg files to keep register bit to default reset value while configuring CPC as SRAM Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t4rdb: fix cpld reset altbankShaohui Xie2015-07-28-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpld reset altbank should always reset to bank4 no matter what current bank is. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/p2020rdb: fix the FDT_ERR_NOTFOUND issueYing Zhang2015-07-28-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the function ft_board_setup() delete the USB2 device node, it leads to can't find the device node and hung up. In fact only P1020RDB needs to delete the USB2 node, this patch fixes this issue. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/T104xD4: Add Secure boot support for T104xD4RDB platformsgaurav rana2015-07-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defconfig files are added and SFP version for these platforms is updated. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/T104xD4RDB: Add T104xD4RDB boards supportPriyanka Jain2015-07-28-6/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-07-29-4/+447
|\ \ \ \
| * | | | T210: Add support for 64-bit T210-based P2571 boardTom Warren2015-07-28-0/+443
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with a 32-bit AVP loader). Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: nyan-big: Allow TPM on I2CSimon Glass2015-07-27-4/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the I2C3 pins so that the TPM can be used. Note: There is an DP change also, caused by running board-to-uboot.py script in the latest tegra-pinmux-script tree. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-09 07:53:18 +0000