| Commit message (Collapse) | Author | Age | Lines |
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For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed
If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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The patch adds support for TTECH vision2 board.
The board has 512MB RAM, SDHC slot and 4MB SPI
device from StMicron.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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As stated in 272017853339f5b9685f9488bdaf5405812d12a4,
the mx51evk has not CPLD and all references must be removed.
This patch drop a .h file that still remains in board
directory.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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The patch adds support for setting gpios to the
MX51 processor and change name to the corresponding
functions for MX31. In this way, it is possible to get rid
of nasty #ifdef switches related to the processor type.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Provides a small speed increase and prepares for fully relocatable image.
Downside is the TEXT_BASE, bss, load address etc must ALL be aligned on a
a 4-byte boundary which is not such a terrible restriction as everything
is already 4-byte aligned anyway
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Tidy up the linker script and discard some sections to save space
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Create more generic names for the symbols exported from the linker script
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Using %ebp as a return pointer prevents creating 'load anywhere' images
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Progress indication is not relocation friendly so remove it in
preperation for full relocatability support
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Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.
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Use TEXT_BASE rather than a hard-coded base address on x86 linker scripts.
This will allow any board to define its base link address without having
to modify the linker script
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Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM. The new
version adds support for up to 23 MAC addresses, instead of just 8. Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".
Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected. Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information. With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled. Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The mpl-specfic memory test is only documented for one board, doesn't
compile cleanly, uses improper coding style, and overlaps functionality
with U-Boot's common 'mtest' command, so lets get rid of it.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: d.peter@mpl.ch
CC: d.mueller@elsoft.ch
CC: wd@denx.de
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The CCM board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot. Remove it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The PCU_E board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot. Remove it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Fix warning:
pm9g45.c: In function 'pm9g45_macb_hw_init':
pm9g45.c:99: warning: unused variable 'pio'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ilko Iliev <iliev@ronetix.at>
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Fix warning:
pm9263.c: In function 'pm9263_macb_hw_init':
pm9263.c:99: warning: unused variable 'pio'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ilko Iliev <iliev@ronetix.at>
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The board includes:
* ADSP-BF561 rev. 0.5
* 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG)
* Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell)
* SPI boot flash on PF2 (M25P64 8MB, or M25P128 16 MB)
* FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB)
* Spartan6-LX150 (memory-mapped; both PPIs also connected)
* See http://www.skutek.com/
Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Support for the Blackfin System Development Platform (SDP) base module.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk. It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
For the GPIO MMR usage, convert to the new GPIO framework.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init function.
Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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This patch brings the lwmon5 board support up-to-date. Here a
summary of the changes:
lwmon5 board port related:
- GPIO's changed to control the LSB transmitter
- Reset USB PHY's upon power-up
- Enable CAN upon power-up
- USB init error workaround (errata CHIP_6)
- EBC: Enable burstmode and modify the timings for the GDC memory
- EBC: Speed up NOR flash timings
lwmon5 board POST related:
- Add FPGA memory test
- Add GDC memory test
- DSP POST reworked
- SYSMON POST: Fix handling of negative temperatures
- Add output for sysmon1 POST
- HW-watchdog min. time test reworked
Additionally some coding-style changes were done.
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.
Signed-off-by: Tirumala R Marri <tmarri@apm.com
Signed-off-by: Stefan Roese <sr@denx.de>
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On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed. So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash. This has a significant performance penalty, but it's
the only way to make it work.
This change allows the 'saveenv' command to work when the video display is
enabled. Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not. Also, while
flash is being written, the video display will be blank.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Add support for the DIU controller. If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Roderik Wildenburg <roderik.wildenburg@manroland.com>
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Conflicts:
include/ppc4xx.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
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This change lays the groundwork for the BOOTFLAG_* flags being removed.
This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
included the mpc8308_p1m board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch provides support for MPC8308 P1M board with the following
set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
Both I2C controllers are supported
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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