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* board: README.sandbox: Update dm test commandJagan Teki2016-04-14-1/+2
| | | | | | | | | Update dm test command with pytest instead of ./test/dm/test-dm.sh Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* xpress: Update <usb/ehci-fsl.h> includeTom Rini2016-04-13-1/+1
| | | | | | | This has been renamed to <usb/ehci-ci.h> some time ago but was missed here. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-13-16/+123
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| * ARM64: zynqmp: Remove netdev.h from board fileMichal Simek2016-04-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including netdev.h is causing compilation warning: + int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); + ^ w+In file included from ../board/xilinx/zynqmp/zynqmp.c:9:0: w+../include/netdev.h:204:41: warning: ‘struct eth_device’ declared inside parameter list [enabled by default] w+../include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] This patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Make DDR detection code work on 32bit systemMichal Simek2016-04-13-3/+3
| | | | | | | | | | | | | | Define u64 types to be usable on 32bit system because of 64bit address and size cells and 32bit shifts in the code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Support systems with more memory banksMichal Simek2016-04-13-12/+120
| | | | | | | | | | | | | | This is example how to change u-boot to support more memory banks read from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-13-29/+1605
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| * | mx6slevk: imximage.cfg: update to fix tINIT3 and tIH-CA violationsTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. There was also a tIH-CA violation and this was resolved by writing the default value in rather than what the script here uses. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6qarm2: imximage_mx6dl.cfg update to fix tINIT3 violationTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mx6sabresd: Remove unneeded enable_lvds() functionFabio Estevam2016-04-03-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_lvds() function only set bits IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT and IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT, but these bits were already set previously inside setup_display(). We can safely remove enable_lvds() then. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx6: Add CCV xPress board supportStefan Roese2016-03-26-0/+650
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the CCV xPress board which is equipped with the i.MX6UL. And provides the following interfaces: - 128MiB DDR - UART - I2C - eMMC (with booting) - Ethernet - USB This patch adds two build targets. One with and one without SPL. The non-SPL version is used for loading U-Boot via USB (imx_usb_loader). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | warp7: Add initial supportFabio Estevam2016-03-26-0/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx6sabresd: Use VESA 1024x768 timingsFabio Estevam2016-03-25-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | VESA 1024x768 results in much more accurate timings. Based on the patch from Soeren Moch for the tbs2910 board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | Merge branch 'next'Stefano Babic2016-03-20-0/+718
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| | * | arm: imx: Add support for GE Bx50v3 boardsAkshay Bhat2016-03-09-0/+718
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for GE B450v3, B650v3 and B850v3 boards. The boards are based on Advantech BA16 module which has a i.MX6D processor. The boards support: - FEC Ethernet - USB Ports - SDHC and MMC boot - SPI NOR - LVDS and HDMI display Basic information about the module: - Module manufacturer: Advantech - CPU: Freescale ARM Cortex-A9 i.MX6D - SPECS: Up to 2GB Onboard DDR3 Memory; Up to 16GB Onboard eMMC NAND Flash Supports OpenGL ES 2.0 and OpenVG 1.1 HDMI, 24-bit LVDS 1x UART, 2x I2C, 8x GPIO, 4x Host USB 2.0 port, 1x USB OTG port, 1x micro SD (SDHC),1x SDIO, 1x SATA II, 1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-04-12-2/+101
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| * | | | arm: mvebu: theadorable: Remove Board name output in checkboardStefan Roese2016-04-12-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This line is not needed, as the board supports DT based probing. And here the "Model:" is already printed: Model: Marvell Armada XP theadorable Board: theadorable One line for the board name is enough. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | arm: mvebu: theadorable: Add PEX-switch detection and reset codeStefan Roese2016-04-12-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the PCIe link for the PEX-switch will not come-up. In this case, the board is not in a usable state. This patch makes sure that in this case a soft-reset is issued. If this soft-reset does not result in the PEX-switch being detected after some soft-reset cycles, an I2C message is sent to the uC to issue a complete power-cycle of the board. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | arm: mvebu: theadorable: Add USB power toggle and tweak USB PHY registerStefan Roese2016-04-12-0/+32
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an USB power toggle for theadorable. Additionally, the USB PHY RX Channel Control 0 Register is changed to fix some issues noticed while accessing some specific USB sticks. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | sunxi: Add defconfig and dts file for Orange Pi One SBCHans de Goede2016-04-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Orange Pi One SBC, is a stripped down version of the popular Orange Pi PC. The one is a H3 based SBC, with 512M of RAM, micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet. The dts is identical to the dts submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | | sunxi: Add INITIAL_USB_SCAN_DELAY Kconfig optionHans de Goede2016-04-12-0/+9
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | Some boards have on board usb devices which need longer than the USB spec's 1 second to connect from board powerup. Add a config option which when non 0 adds an extra delay before the first usb bus scan. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | rpi: remove redundant board filesStephen Warren2016-04-11-40/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that rpi_*defconfig and Kconfig (rather than the config header file) provide the identity of the build, we don't need to separate config headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This requires a tiny number of extra ifdefs in the config header. The only disadvantage of this approach is that the $board/$board_name environment variables aren't as descriptive as they used to be. This isn't really an issue because those only exist to allow scripts to create DTB filenames at runtime. However, the RPi board code already sets $fdtfile to something more accurate based on FW-reported board ID anyway. While at it, unify some Kconfig select options, and add a MAINTAINERS entry for bcm283x too. Partially-suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | board: ti: am57xx: Prevent init_sata() from being called twiceRoger Quadros2016-04-11-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | init_sata() is done as part of scsi_init() in arch/arm/cpu/armv7/omap-common/sata.c so no need to duplicate it here. This seems to fix SATA problems in the kernel when CONFIG_TI_PIPE3 is configured as loadable module. Cc: Cooper Jr., Franklin <fcooper@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* | | ARM: add Raspberry Pi 3 64-bit configStephen Warren2016-04-11-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all Pis so far, the VC FW provides a short stub to set up the ARM CPU before entering the kernel (a/k/a U-Boot for us). This feature is not currently supported by the VC FW when booting in 64-bit mode. However, this feature will likely appear in the near future, and this U-Boot port assumes that such a feature is in place. Without that feature, or a temporary workaround described below, U-Boot will not boot. Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can be used drectly as kernel7.img, in the same way as any other RPi port. The following config.txt is required: # Fix mini UART input frequency, and setup/enable up the UART. # Without this option, U-Boot will not boot, even if you don't care # about the serial console. This option will always be required for # all RPi3 use-cases, unless the PL011 UART is used, which is not # yet supported by rpi_3* builds of U-Boot. enable_uart=1 # Boot in AArch64 (64-bit) mode. # It is possible that a future VC FW will remove the need for this # option, instead auto-setting 32-/64-bit mode based on the "kernel" # filename present on the SD card. arm_control=0x200 Prior to the VC FW providing the ARM boot stub, you can use the following steps to build an equivalent stub into the U-Boot binary: git clone https://github.com/swarren/rpi-3-aarch64-demo.git \ ../rpi-3-aarch64-demo (cd ../rpi-3-aarch64-demo && ./build.sh) Build U-Boot for rpi_3 in the usual way cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed Use u-boot.bin.stubbed as kernel7.img on the Pi SD card. In this case, the following additional entries are required in config.txt: # Tell the FW to load the kernel image at address 0, the reset vector. kernel_old=1 Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | arm: socfpga: sockit: Use more relaxed DRAM timingsMarek Vasut2016-04-10-80/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The currently present DRAM timings generated from GHRD 14.0 did not work on SoCkit rev. D because they were too tight. Load the DRAM timings from GHRD 13.0 which are more relaxed and work with SoCkit rev. D. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | | armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-06-47/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* | | armv8: ls1043aqds: make sure fixed-link property is big endianShaohui Xie2016-04-06-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | When setting fixed-link property to DTS, the values should be converted with using cpu_to_fdt32 so that to have correct value on little endian Soc. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-04-259/+1483
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| * | | block: Add support for Ceva sataMichal Simek2016-04-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial Ceva Sata init code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | | ARM64: zynqmp: Simplify MAINTAINERS file to support more boardsMichal Simek2016-04-04-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Handle all Xilinx ZynqMP boards with one fragment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM64: zynqmp: Read RAM information from DTMichal Simek2016-04-04-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read information about memory from DT. This patch simplify life with synchronization between DT and board files. dram_init() only needs maximum RAM size below 4GB that's why please sort banks in memory node. dram_init_banksize() copies memory setup to bi_dram[]. This will avoid reading information from DT twice. Memory test start/end were changed to DDR location to let memtest still compiled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Remove !OF_CONTROL code for timer and interruptMichal Simek2016-04-04-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | OF_CONTROL is enabled by default that's why this is dead code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: Fix default ps7_init_gpl.c/h for ZYBOMichal Simek2016-04-04-244/+1342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is incorrect setting for USB which didn't work with origin ps7_init_gpl.X files. Use default setting for Digilent Zybo projects with HDMI in PL. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | net: gem: Allow to set the MAC from an EEPROMJoe Hershberger2016-04-04-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide board specific option how to read MAC address from ROM. Do it in generic way to be reusable by differnet boards. If this is not enough board specific functions can be created. Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | arm: mvebu: Add basic support for Armada 375 eval board db-88f6720Stefan Roese2016-04-04-0/+116
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell A375 eval board. Tested are the following interfaces: - I2C - SPI - SPI NOR - Ethernet (mvpp2), port 0 & 1 Currently the A375 SerDes and DDR3 init code is not intergrated. So the SPL U-Boot is not fully functional. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | | board: Add Qualcomm Dragonboard 410C supportMateusz Kulikowski2016-04-01-0/+355
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit add support for 96Boards Dragonboard410C. It is board based on APQ8016 Qualcomm SoC, complying with 96boards specification. Features (present out of the box): - 4x Cortex A53 (ARMv8) - 2x USB Host port - 1x USB Device port - 4x LEDs - 1x HDMI connector - 1x uSD connector - 3x buttons (Power, Vol+, Vol-/Reset) - WIFI, Bluetooth with integrated antenna - 8GiB eMMC U-Boot boots chained with fastboot in 64-bit mode. For detailed build instructions see readme.txt in board directory. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Tested-by: Simon Glass <sjg@chromium.org>
* | | usb: Rename ehci-fsl.h to ehci-ci.hMateusz Kulikowski2016-04-01-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* | | board: ti: DRA7: Add DP83867 TI phy for rev cDan Murphy2016-04-01-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required. Signed-off-by: Dan Murphy <dmurphy@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | sniper: Change vendor name from lge to lg, matching devicetree vendor prefixPaul Kocialkowski2016-04-01-2/+2
| | | | | | | | | | | | | | | | | | | | | This moves the sniper board from the lge to lg, in order to match the devicetree vendor prefix already defined in the kernel. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | kc1: Proper reboot mode and boot reason validationPaul Kocialkowski2016-04-01-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the previous implementation, rebooting without registering a recognized reboot mode would end up with U-Boot checking for a valid power-on reason, which might result in the device turning off (e.g. with no USB cable attached and no buttons pressed). Since this approach is not viable (breaks reboot in most cases), the validity of the reboot reason is checked (in turn, by checking that a warm reset happened, as there is no magic) to detect a reboot and the 'o' char is recognized to indicate that power-off is required. Still, that might be overridden by the detection of usual power-on reasons, on purpose. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | sniper: Proper reboot mode and boot reason validationPaul Kocialkowski2016-04-01-10/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the previous implementation, rebooting without registering a recognized reboot mode (despite registering the magic) would end up with U-Boot checking for a valid power-on reason, which might result in the device turning off (e.g. with no USB cable attached and no buttons pressed). This was designed to catch reboots that are actually intended to be power-off, something that old Android kernels do, instead of properly turning the device off using the TWL4030. However, since this approach is not viable (breaks reboot in most cases), the validity of the reboot mode magic is checked to detect a reboot and the 'o' char is recognized to indicate that power-off is required. Still, that might be overridden by the detection of usual power-on reasons, on purpose. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | rpi: BCM2837 and Raspberry Pi 3 32-bit supportStephen Warren2016-04-01-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | rpi: add Raspberry Pi 3 board IDStephen Warren2016-04-01-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows U-Boot to known the name of the board. The existing rpi_2_defconfig can operate correctly on the Raspberry Pi 3 in 32-bit mode /if/ you have configured the firmware to use the PL011 UART as the console UART (the default is the mini UART). This requires two things: a) config.txt should contain dtoverlay=pi3-miniuart-bt b) You should run the following to tell the VC FW to process DT when booting, and copy u-boot.bin.img (rather than u-boot.bin) to the SD card as the kernel image: path/to/kernel/scripts/mkknlimg --dtok u-boot.bin u-boot.bin.img This works as of firmware.git commit 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | rpi: use constant "unknown board" DT filenameStephen Warren2016-04-01-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To simplify support for new SoCs, just use a constant filename for the unknown case. In practice this case shouldn't be hit anyway, so the filename isn't relevant, and certainly doesn't need to differentiate between SoCs. If a user has an as-yet-unknown board, they can override this value in the environment anyway. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | sunxi: Reserve ATF memory space on A64Alexander Graf2016-04-01-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the A64 we usually boot with ATF running in EL3. ATF as it is available today resides in the first 16MB of RAM. So we should make sure we reserve that space in our memory maps. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | sunxi: Add Pine64+ supportSiarhei Siamashka2016-04-01-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Pine64+ is a system based on the Allwinner A64 SoC. It is capable of running AArch64 code and thus is the first of its kind for the sunxi target. This patch adds a defconfig and device tree chunks for it. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: Change patch description] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | sunxi: Add support for Allwinner A64 SoCsSiarhei Siamashka2016-04-01-7/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | power: axp818: Add support for FLDOsChen-Yu Tsai2016-03-31-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The FLDOs on AXP818 PMIC normally provide power to CPUS and USB HSIC PHY on the A83T/H8. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-29-28/+112
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| * | | armv8/ls2080ardb: Enable VID supportRai Harninder2016-03-29-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-09 19:34:06 +0000