| Commit message (Collapse) | Author | Age | Lines |
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mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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rename to fdt_path_offset
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
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Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
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On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Larry Johnson <lrj@acm.org>
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Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
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These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
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This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
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These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
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Signed-off-by: Larry Johnson <lrj@acm.org>
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Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
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Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:
$ /usr/bin/test a == a && echo OK
/usr/bin/test: ==: binary operator expected
This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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This patch adds some BSP commands and FPGA booting support
for esd's PMC440 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- add EEPROM write protection for esd PLU405 boards.
- initialize NAND GPIOs
- use correct io accessors
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- add EEPROM write protection
- initialize NAND GPIOs
- use correct io accessors
- slow down I2C clock to 100kHz
- enable ext. I2C bus
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Conflicts:
MAINTAINERS
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Conflicts:
drivers/Makefile
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Conflicts:
drivers/Makefile
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Conflicts:
CREDITS
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This adds support for the Hitachi MS7750SE.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE targets.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Updated the MPC8568 MDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Updated the MPC8540 ADS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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