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* Coding Style cleanup; generate new CHANGELOG file.Wolfgang Denk2007-06-06-2/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-06-06-19/+9
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| * Merge branch 'mpc8641'Jon Loeliger2007-06-05-19/+5
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| | * mpc8641 image size cleanupEd Swarthout2007-06-05-19/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | Merge branch 'mpc8641'Jon Loeliger2007-05-10-0/+4
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| | * 8641hpcn: Fix Makefile after moving pixis to board/freescale.Ed Swarthout2007-05-08-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-armWolfgang Denk2007-06-06-1683/+819
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| * | | Reduce line lengths to 80 characters max.Peter Pearse2007-05-18-1/+2
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| * | | Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-05-18-27/+488
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| * | | | Add the board directory for SMN42Peter Pearse2007-05-09-0/+796
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| * | | | Remove the deleted files for the SMN42 patchPeter Pearse2007-05-09-1430/+0
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| * | | | New board SMN42 branchPeter Pearse2007-05-09-253/+22
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* | | | Merge with /home/stefan/git/u-boot/acadia-nand-bootStefan Roese2007-06-06-4/+263
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| * | | | ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese2007-06-06-4/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-06-04-115/+260
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| * | | | ppc4xx: Add missing file for Bamboo NAND booting supportStefan Roese2007-06-01-0/+137
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese2007-06-01-109/+123
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| | * | | | ppc4xx: Update Sequoia NAND booting support with ECCStefan Roese2007-06-01-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| | * | | | ppc4xx: Prepare Bamboo port for NAND booting supportStefan Roese2007-06-01-109/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHzStefan Roese2007-06-01-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch undoes the patch by Jeff Mann with commit-id ada4697d. As suggested by AMCC it is not recommended to dynamically change the EBC speed after bootup. So we undo this change to be on the safe side. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/stx-gp3ssaWolfgang Denk2007-05-31-2/+1
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| * | | | | Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.Wolfgang Denk2007-05-31-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | Merge with /home/tur/git/u-boot#motionproWolfgang Denk2007-05-28-5/+52
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| * | | | | | Motion-PRO: Code cleanup, fix of a typo in OF_STDOUT_PATH.Bartlomiej Sieka2007-05-27-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | MPC5XXX, Motion-PRO: Fix PHY initialization problem.Bartlomiej Sieka2007-05-27-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which networking does not function. This commit switches PHY to TX mode by clearing the FX_SEL bit of Mode Control Register. It also reverses commit 008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add displaying of CPLD revision information during boot.Bartlomiej Sieka2007-05-27-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add LED support.Bartlomiej Sieka2007-05-27-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Signed-off-by: Marian Balakowicz <m8@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
* | | | | | | ppc4xx: Update AMCC Acadia support for board revision 1.1Stefan Roese2007-05-24-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Acadia (405EZ) support for the new 1.1 board revision. It also adds support for NAND FLASH via the 4xx NDFC. Please note that the jumper J7 must be in position 2-3 for this NAND support. Position 1-2 is for NAND booting only. NAND booting support will follow later. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-05-18-27/+488
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| * | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-05-16-2/+424
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| | * | | | | | Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | | | | mpc83xx: Add MPC8313ERDB support.Scott Wood2007-04-23-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-microblazeWolfgang Denk2007-05-16-25/+53
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| | * \ \ \ \ \ \ Merge git://www.denx.de/git/u-bootMichal Simek2007-05-08-1501/+12270
| | |\ \ \ \ \ \ \ | | | | |_|_|_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/asm-microblaze/microblaze_intc.h include/linux/stat.h
| | * | | | | | | new: USE_MSR_INTR supportMichal Simek2007-05-07-1/+2
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| | * | | | | | | new: fsl interrupt supportMichal Simek2007-05-07-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FSL_Has_data is connected to INTC.
| | * | | | | | | new: add writing to msr registerMichal Simek2007-05-07-15/+19
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| | * | | | | | | new: FSL and MSR support #2Michal Simek2007-05-05-0/+3
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| | * | | | | | | Change ML401 parameters - Xilinx BSPMichal Simek2007-04-21-13/+13
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| * | | | | | | | Merge with /home/tur/git/u-boot#motionproWolfgang Denk2007-05-15-0/+11
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| | * | | | | | [Motion-PRO] Enable Flat Device Tree support and modify default environmentBartlomiej Sieka2007-05-08-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to allow booting of FDT-expecting kernels.
* | | | | | | | [PATCH] Run new sequoia boards with an EBC speed of 83MHzJeffrey Mann2007-05-16-2/+8
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the Sequoia board does not boot with an EBC faster than 66MHz, the clock divider are changed after the initial boot process. This allows for maximum clocking speeds to be achieved on newer boards. Sequoia boards with 666.66 MHz processors require that the EBC divider be set to 3 in order to start the initial boot process at a slower EBC speed. After the initial boot process, the divider can be set back to 2, which will cause the boards to run at 83.333MHz. This is backward compatible with boards with 533.33 MHz processors, as these boards will already be set with an EBC divider of 2. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
* | | | | | | Coding stylke cleanup; update CHANGELOG.Wolfgang Denk2007-05-05-13/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-05-05-95/+10
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| * \ \ \ \ \ \ Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-05-05-0/+897
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| * | | | | | | ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND bootingStefan Roese2007-05-05-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big for the 4k NAND boot image so define bus_frequency to 133MHz here which is save for the refresh counter setup. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-04-29-220/+2231
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| * | | | | | ppc4xx: Bamboo: Use current NAND driver and *not* the legacy driverStefan Roese2007-04-29-94/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-05-05-46/+1743
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| * | | | | | | Cleaned up some 85xx PCI bugsAndy Fleming2007-05-02-11/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-11-15 03:34:26 +0000