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| * | | powerpc: P1025RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1025RDB. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1024RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1024RDB instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and macros. Remove macro CONFIG_P1024RDB. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1021RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1021RDB instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and macros. Remove macro CONFIG_P1021RDB. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1020UTM: Separate from P1_P2_RDB_P2 in KconfigYork Sun2016-11-23-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1020UTM instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020UTM. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1020RDB-PD: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1020RDB_PD instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020RDB_PD. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1020RDB-PC: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1020RDB_PC instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020RDB_PC. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1020MBG: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and other macros. Remove macro CONFIG_P1020MBG. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1022DS: Remove macro CONFIG_P1022DSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_P1022DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: P1010RDB: Remove macros CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PBYork Sun2016-11-23-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8572DS: Remove macro CONFIG_MPC8572DSYork Sun2016-11-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8572DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8572: Remove macro CONFIG_MPC8572York Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace CONFIG_MPC8572 with ARCH_MPC8572 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8569MDS: Remove macro CONFIG_MPC8569MDSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8569MDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8555CDS: Remove macro CONFIG_MPC8555CDSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8555CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Replace with CONFIG_TARGET_MPC8541CDS from Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8536DS: Remove macro CONFIG_MPC8536DSYork Sun2016-11-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8536DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8544DS: Remove macro CONFIG_MPC8544DSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8544DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8548CDS: Remove macro CONFIG_MPC8548CDSYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_TARGET_MPC8548CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | powerpc: MPC8548: Move CONFIG_MPC8548 to Kconfig optionYork Sun2016-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* | | | vexpress64: Juno: Change PCI buss addresses for IO to start from zero.Liviu Dudau2016-11-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First, that will trip devices that cannot use more than 16 bits of addresses for IO, second it is un-necessary as the system can handle zero-based PCI addresses just fine. Change the mapping to start IO bus addresses from zero. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
* | | | bcm2835: Reserve the spin table in efi memory mapAlexander Graf2016-11-28-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Firmware provides a spin table on the raspberry pi. This table shouldn't get overwritten by payloads, so we need to mark it as reserved. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | | | ARM: bcm283x: use OF_CONTROL for bcm283xFabian Vogt2016-11-28-37/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes use of U_BOOT_DEVICE in board/raspberrypi/rpi/rpi.c, enables OF_CONTROL in the config and adjusts the rpi_*defconfig configs. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | board: rpi: move uart deactivation to board_initFabian Vogt2016-11-28-14/+26
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using OF_CONTROL, the disabled value of the mini UART platdata gets reset after board_early_init_f. So move detection and disabling to board_init and remove board_early_init_f. This uses the first device using the mini uart driver, as this method works reliably with different device trees or even no device tree at all. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | keystone2: Move target selection to KconfigAndrew F. Davis2016-11-28-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | The config option TARGET_K2x_EVM is set by the k2x defconfigs to pick a board target, but the header configs also set K2x_EVM. This config is redundant, remove it and use TARGET_K2x_EVM everywhere in its place. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | colibri_vf: usb gadget: toradex pid is now set genericallyMax Krummenacher2016-11-28-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | remove now unused CONFIG_TRDX_PID_XXX Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
* | | apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handlingMarcel Ziswiler2016-11-28-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | With our common code in place actually make use of it across all our modules. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
* | | toradex: config block handlingMarcel Ziswiler2016-11-28-0/+873
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Toradex factory configuration block handling. The config block is a data structure which gets stored to flash during production testing. The structure holds such information as board resp. hardware revision, product ID and serial number which is used as the NIC part of the Ethernet MAC address as well. The config block will be read upon boot by the show_board_info() function, displayed as part of the board information and passed to Linux via device tree or ATAGs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
* | | sunxi: add support for Nintendo NES Classic EditionFUKAUMI Naoki2016-11-28-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add board support for sun8i_r16 Nintendo NES Classic edition. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> [jagan: Add commit message body] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-11-26-30/+82
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| * | | rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)Simon Glass2016-11-25-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Asus Chromebook Flip, an RK3288-based clamshell device which can flip into 'tablet' mode. The device tree file comes from Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: Add support for veyron-mickey (Chromebit)Simon Glass2016-11-25-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Asus Chromebit, and RK3288-based device designed to plug directly into an HDMI monitor. The device tree file comes from Linux v4.8. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: veyron: Add a note about the SDRAM voltageSimon Glass2016-11-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a comment to indicate that we are not supporting the PWM regulator yet. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: Rename jerry files to veyronSimon Glass2016-11-25-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we have a single rk3288-based Chromebook: chromebook_jerry. But all such Chromebooks can use the same binary with only device-tree differences. The family name is 'veyron', so rename the files accordingly. Also update the device-tree filename since this currently differs from Linux. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | evb-rk3399: deduced the dram node size when space reservedKever Yang2016-11-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The size dram node need to be deduced by the same amount of reserved space. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-11-25-28/+629
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/Kconfig
| * | | | armv8: fsl-layerscape: Add NXP LS2088A SoC supportPriyanka Jain2016-11-22-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QorIQ LS2088A SoC is built on layerscape architecture. It is similar to LS2080A SoC with some differences like 1)Timer controller offset is different 2)It has A72 cores 3)It supports TZASC module Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | arm: ls1021a: improve the core frequency to 1.2GHZYuan Yao2016-11-21-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change core clock to 1.2GHz in the configurations for SD and NAND boot. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls2080aqds: fix SGMII repeater settingsShaohui Xie2016-11-21-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current value to check whether the PHY was configured has dependency on MC, it expects MC to start PCS AN, this is not true during boot up, so it should be changed to remove the dependency. The PHY's register space should be restore to default after accessing extended space. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls2080a: Update serdes protocol supportPriyanka Jain2016-11-21-3/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add these serdes protocols Serdes1: 0x39, 0x4B, 0x4C, 0x4D Serdes2: 0x47, 0x57 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1046aqds: add lpuart supportShaohui Xie2016-11-21-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LPUART0 is used by default, and it's using platform clock. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv7: Add support of ls1021a-iot boardFeng Li2016-11-21-0/+464
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds support for Freescale ls1021a-iot board. Signed-off-by: Feng Li <feng.li_2@nxp.com> [YS: rewrite commit message, fix whitespace in Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
* | | | colibri_pxa270: transition to driver model for serialMarcel Ziswiler2016-11-23-2/+16
| |/ / |/| | | | | | | | | | | | | | | | | Add serial platform data to board file. Enable driver model for PXA serial driver. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | | am57xx: Remove unused variable warningsTom Rini2016-11-21-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with the changes to fix USB host on am57xx/am43xx we stopped using usb_otg_ss1/related stuff and but we hadn't been enabling the relevant options to cause the warnings until just recently. Fixes: 55efadde7ede (ARM: AM57xx: AM43xx: Fix USB host) Fixes: a48d687c575f (configs: am57xx: Enable download gadget) Signed-off-by: Tom Rini <trini@konsulko.com>
* | | rpi: passthrough of the firmware provided FDT blobCédric Schieli2016-11-21-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raspberry firmware used to pass a FDT blob at a fixed address (0x100), but this is not true anymore. The address now depends on both the memory size and the blob size [1]. If one wants to passthrough this FDT blob to the kernel, the most reliable way is to save its address from the r2/x0 register in the U-Boot entry point and expose it in a environment variable for further processing. This patch just does this: - save the provided address in the global variable fw_dtb_pointer - expose it in ${fdt_addr} if it points to a a valid FDT blob There are many different ways to use it. One can, for example, use the following script which will extract from the tree the command line built by the firmware, then hand over the blob to a previously loaded kernel: fdt addr ${fdt_addr} fdt get value bootargs /chosen bootargs bootz ${kernel_addr_r} - ${fdt_addr} Alternatively, users relying on sysboot/pxe can simply omit any FDT statement in their extlinux.conf file, U-Boot will automagically pick ${fdt_addr} and pass it to the kernel. [1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018 Signed-off-by: Cédric Schieli <cschieli@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | board: ti: amx3xx: Remove multiple EEPROM readsLokesh Vutla2016-11-21-34/+13
|/ / | | | | | | | | | | | | Detect the board very early and avoid reading eeprom multiple times. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini2016-11-17-13/+24
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch queue for efi - 2016-11-17 Highlights this time around: - x86 efi_loader support - hello world efi test case - network device name is now representative - terminal output reports modes correctly - fix psci reset for ls1043/ls1046 - fix efi_add_runtime_mmio definition for x86 - efi_loader support for ls2080
| * | ls2080ardb: Reserve DP-DDR RAMAlexander Graf2016-11-17-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's rather claim it's a reserved region in the EFI memory map Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: York Sun <york.sun@nxp.com>
| * | ls2080: Exit dpaa only right before exiting U-BootAlexander Graf2016-11-17-13/+15
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ls2080 we have a separate network fabric component which we need to shut down before we enter Linux (or any other OS). Along with that also comes configuration of the fabric using a description file. Today we always stop and configure the fabric in the boot script and (again) exit it on device tree generation. This works ok for the normal booti case, but with bootefi the payload we're running may still want to access the network. So let's add a new fsl_mc command that defers configuration and stopping the hardware to when we actually exit U-Boot, so that we can still use the fabric from an EFI payload. For existing boot scripts, nothing should change with this patch. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: York Sun <york.sun@nxp.com> [agraf: Fix x86 build]
* | ARM64: zynqmp: Ignore warnings from autogenerated filesMichal Simek2016-11-15-0/+12
| | | | | | | | | | | | | | | | Autogenerated files contain casting issues and missing function declaration and even usleep implementation. Suppress them for now till these files are fixed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Fix secondary bootmode enablingMichal Simek2016-11-15-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not setup use_alt bit which copy alternative boot mode to boot mode. The reason is that this bit is cleared after POR but not after any software reset which will cause that after SW reset bootrom will look for different boot image. This patch setups alternative boot mode selection (purely SW handling) and extends code to read this alternative boot mode first and use it if it is setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Add support for SD1 with level shifters bootmodeSiva Durga Prasad Paladugu2016-11-15-0/+3
| | | | | | | | | | | | | | Add support for SD1 with level shifters bootmode. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-11-02 09:22:43 +0000