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| * | Merge the new NAND code (testing-NAND brach); see doc/README.nandWolfgang Denk2006-03-06-56/+1832
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
| | * | Re-factoring the legacy NAND code (legacy NAND now only in board-specificBartlomiej Sieka2006-03-05-62/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is implemented for these boards.
| * | | Add lowboot target to mcc200 boardStefan Roese2006-03-04-2/+14
| | | | | | | | | | | | | | | | Patch by Stefan Roese, 4 Mar 2006
| * | | Fix problem with flash_get_size() from CFI driver updateStefan Roese2006-03-01-0/+3
| | | | | | | | | | | | | | | | Patch by Stefan Roese, 1 Mar 2006
| * | | Convert mcc200 to use common CFI flash driverStefan Roese2006-02-28-1211/+48
| | | | | | | | | | | | | | | | Patch by Stefan Roese, 28 Feb 2006
| * | | Major CFI-FLASH driver update:Stefan Roese2006-02-28-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add env-variable "unlock" to handle initial state of sectors (locked/unlocked). Only the U-Boot image and it's environment is protected, all other sectors are unprotected (unlocked) if flash hardware protection is used (CFG_FLASH_PROTECTION) and the environment variable "unlock" is set to "yes". Patch by Stefan Roese, 28 Feb 2006 * Update drivers/cfi_flash.c: - find_sector() called in both versions of flash_write_cfiword() Patch by Peter Pearse, 27th Feb 2006 * CFI support for a x8/x16 AMD/Spansion flash configured in x8 mode Patch by Jose Maria Lopez, 16 Jan 2006 * Add support for AMD/Spansion Flashes in flash_write_cfibuffer Patch by Alex Bastos and Thomas Schaefer, 2005-08-29 * Changes/fixes for drivers/cfi_flash.c: We *should* check if there are any error bits if the previous call returned ERR_OK (Otherwise we will have output an error message in flash_status_check() already.) The original code would only check for error bits if flash_status_check() returns ERR_TIMEOUT. Patch by Marcus Hall, 23 Aug 2005 * Changes/fixes for drivers/cfi_flash.c: - Add CFG_FLASH_PROTECT_CLEAR on drivers/cfi_flash.c - Prohibit buffer write when buffer_size is 1 on drivers/cfi_flash.c Patch by Sangmoon Kim, 19 Aug 2005 * Fixes for drivers/cfi_flash.c: - Fix wrong timeout value usage in flash_status_check() - Round write_tout up when converting to msec in flash_get_size() - Remove clearing flash status at the end of flash_write_cfibuffer() which sets Intel 28F640J3 flash back to command mode on CSB472 Patch by Tolunay Orkun, 02 July 2005
| * | | Cleanup MCC200 board.Wolfgang Denk2006-02-24-7/+1
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| * | | Initial port to MCC200 board (work in progress)Wolfgang Denk2006-02-22-0/+1815
| | | | | | | | | | | | | | | | Minimally modified patch by Bluetechnix, Vienna
* | | | Cleanup of NAND support of delta board using the Monahans Data FlashMarkus Klotzbücher2006-03-06-202/+78
| | | | | | | | | | | | | | | | Controller.
* | | | NAND finally working. Two bugs fixed:Markus Klotzbücher2006-03-06-8/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * For READ_STATUS and READID commands always 8 bytes need to be read from NDDB. Otherwise they stay there and get send to flash as the first data word when writing. * In nand_base.c the oob variable is not reset so this->oob_buf is overwritten what eventually screws up the bad block descriptor table.
* | | | Lots of new stuff:Markus Klotzbücher2006-03-04-67/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Debug message can be turned on and off. * Waiting for events now times out. * Implemented RESET command. * Added appropriate nand_bbt_descriptor and nand_oobinfo. Remaining Problems: * Read Status still behaves weird an returns invalid stuff sometimes. * ECC Placement does not respect our scheme in nand_oobinfo.
* | | | Erasing works too now. The CS don't care causes problem with READSTATUS,Markus Klotzbücher2006-03-03-5/+10
| | | | | | | | | | | | | | | | don't ask me why. There are still bugs in the bad block logic.
* | | | Write operation is working. Turned out that the READSTATUS hack was wrongMarkus Klotzbücher2006-03-03-0/+2
| | | | | | | | | | | | | | | | after all.
* | | | Writing is working, but there's still a bug that causes the data written toMarkus Klotzbücher2006-03-03-25/+73
| | | | | | | | | | | | | | | | start at an offset of 4 bytes from the start of the page.
* | | | Implemented writing, not working yet.Markus Klotzbücher2006-03-03-54/+158
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* | | | Moved the waiting loop for "Read Data Request" RDDREQ into theMarkus Klotzbücher2006-03-02-15/+19
| | | | | | | | | | | | | | | | | | | | delta_cmdfunc function, because this bit is only set once after a command is sent and this allows read functions to be called multiple times.
* | | | Read bug fixed. Now "nand bad" list the badblocks correctly (i hope, sinceMarkus Klotzbücher2006-03-02-2/+5
| | | | | | | | | | | | | | | | there are 0)
* | | | Further NAND stuff implemented. Basic read commands seem to work.Markus Klotzbücher2006-03-01-83/+146
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* | | | Added GPIO initialization of DF signal. Still not working.Markus Klotzbücher2006-02-28-2/+40
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* | | | First steps implementing NAND support. Not working, fails to read ID.Markus Klotzbücher2006-02-28-436/+311
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* | | | Merge /home/tur/nand/u-boot/Markus Klotzbücher2006-02-24-31/+1780
|\ \ \ \ | | |/ / | |/| | | | | | This is a first version of the testing-NAND branch merged back to main.
| * | | Merge with /home/wd/git/u-boot/testing-NAND/ to add new NAND handling.Bartlomiej Sieka2006-02-24-31/+1780
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| | * | | Update of new NAND codeWolfgang Denk2005-09-14-0/+1622
| | | | | | | | | | | | | | | | | | | | Patch by Ladislav Michl, 13 Sep 2005
* | | | | Merge branch 'master' of http://www.denx.de/git/u-bootMarkus Klotzbücher2006-02-24-3331/+2632
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| * | | | Convert CPCI750 to use common CFI flash driverStefan Roese2006-02-08-764/+18
| | | | | | | | | | | | | | | | | | | | Patch by Reinhard Arlt, 8 Feb 2006
| * | | | Various changes to esd HH405 board specific filesStefan Roese2006-02-07-2567/+2614
| |/ / / | | | | | | | | | | | | Patch by Matthias Fuchs, 07 Feb 2006
* | | | SDRAM now working.Markus Klotzbücher2006-02-22-2/+3
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* | | | SDRAM now working for delta board, but there are still aliasing problems,Markus Klotzbücher2006-02-22-24/+10
| | | | | | | | | | | | | | | | we only see 64MB.
* | | | SDRAM seems to be working on delta board, though u-boot doesn't start yet.Markus Klotzbücher2006-02-22-58/+83
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* | | | New board directory and config for the benq delta board (copied fromMarkus Klotzbücher2006-02-20-0/+992
| | | | | | | | | | | | | | | | zylonite). Minor pxa-regs.h update.
* | | | basic u-boot is working, boots into the command shell.Markus Klotzbücher2006-02-09-0/+3
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* | | | Changes:Markus Klotzbücher2006-02-08-20/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * lots of bugfixes in the assembler code * reverted hardware.h back to original * enabled hardware DRAM calibration * GCC-4 fix: modified GLOBAL_DATA_POINTER macro
* | | | Forgot to add files to zylonite branch.Markus Klotzbücher2006-02-07-0/+880
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* | | Fix various compiler warnings on ppc4xx builds (ELDK 4.0)Stefan Roese2006-01-18-10/+10
| | | | | | | | | | | | Patch by Stefan Roese, 18 Jan 2006
* | | Add VGA support (CT69000) to CPCI750 board.Stefan Roese2006-01-18-8/+72
| | | | | | | | | | | | | | | | | | Insert missing __le32_to_cpu() for filesize in ext2fs_read_file(). Patch by Reinhard Arlt, 30 Dec 2005
* | | PMC405 and CPCI405: Moved configuration of pci resources into config file.Stefan Roese2006-01-18-49/+191
| | | | | | | | | | | | | | | | | | PMC405 and CPCI2DP: Added firmware download and booting via pci. Patch by Matthias Fuchs, 20 Dec 2005
* | | Fix 28F256J3A support on PM520 boardWolfgang Denk2006-01-13-4/+5
| |/ |/| | | | | (without bank-switching only 32 MB can be accessed)
* | Add support for 28F256J3A flah (=> 64 MB) on PM520 boardWolfgang Denk2005-12-29-3/+15
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* | Fix compiler problem with at91rm9200dk board.Wolfgang Denk2005-12-19-1/+1
| | | | | | | | Patch by Eugen Bigz, 19 Dec 2005
* | Changes to Yellowstone & Yosemite 440EP/GR eval boards:Stefan Roese2005-12-15-14/+172
| | | | | | | | | | | | | | | | - Changed GPIO setup to enable another address line in order to address 64M of FLASH. - Added function sdram_tr1_set to auto calculate the tr1 value for the DDR. Patch by Steven Blakeslee, 12 Dec 2005
* | (no commit message)Wolfgang Denk2005-12-12-0/+277
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* | Code cleanup, especially MIPS for GCC 4.xWolfgang Denk2005-12-04-63/+61
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* | Add support for TQM8541/8555 boards, TQM85xx support reworked:Stefan Roese2005-11-30-925/+365
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Support for TQM8541/8555 boards added. - Complete rework of TQM8540/8560 support. - Common TQM85xx code now supports all current TQM85xx platforms (TQM8540/8541/8555/8560). - DDR SDRAM size detection added. - CAS latency default values can be overwritten by setting "serial#" to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used. If problems are detected with this non default CAS latency, the defualt values will be used instead. - FLASH size detection added. - Moved FCC ethernet driver initialization behind TSEC driver init -> TSEC is first device. Patch by Stefan Roese, 30 Nov 2005
* | Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.Stefan Roese2005-11-29-0/+1034
| | | | | | | | Patch by John Otken, 23 Nov 2005
* | Minor AMCC 4xx board cleanupsStefan Roese2005-11-29-36/+0
| | | | | | | | Patch by Stefan Roese, 27 Nov 2005
* | Changed PPC44x startup message (cpu info, speed...) to common style:Stefan Roese2005-11-27-80/+3
| | | | | | | | | | | | | | | | | | | | | | On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional informations like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005
* | Add support for Prodrive P3P440 board:Stefan Roese2005-11-22-0/+661
| | | | | | | | | | | | | | - Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c - CFG_FLASH_QUIET_TEST added to use the common CFI driver for bank autodetection Patch by Stefan Roese, 22 Nov 2005
* | Change all '$(...)' variable references into '${...}'Wolfgang Denk2005-11-20-25/+25
| | | | | | | | | | | | which makes the environment compatible with the hush shell. WARNING: Support for the old '$(...)' syntax will be discontinued in a later version.
* | Minor changes to init flags in TQM834x PCI.Rafal Jaworowski2005-11-17-3/+3
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* | Merge with /server/home/stefan/git/u-boot/bamboo-sdramStefan Roese2005-11-15-19/+38
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