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* nitrogen6x: configure SGTL5000, CSI camera clock outputsTroy Kisky2014-10-06-1/+7
| | | | | | | | | | Configure CLKO outputs for SGTL5000, CSI camera. The sys_mclk output for the SGTL500 in particular prevents Windows CE from properly driving audio. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* nitrogen6x: power-down miscellanous peripheralsEric Nelson2014-10-06-4/+43
| | | | | | | | Ensure that cameras and USB OTG power are in a stable (reset) state at reset by configuring their pads and toggling GPIOs. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* nitrogen6x: configure SD2 pads for SDIO on USDHC2Eric Nelson2014-10-06-0/+11
| | | | | | | | | | Pads SD2_CLK/CMD/DAT0-3 are connected to an SDIO WiFi device on Nitrogen and unconnected on BD-SL-i.MX6 (sabre lite). Configure them as SDIO pins to prevent them from being in a state that confuses the WiFi part. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* nitrogen6x: simplify board_mmc_getcdTroy Kisky2014-10-06-10/+4
| | | | | | | The same logic applies to both SD card slots, only with different GPIOs and the code should make that easier to see. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* nitrogen6x: implement board_cfb_skip() to disable text outputEric Nelson2014-10-06-0/+5
| | | | | | | | Several customers have asked to leave the display quiet during boot, so allow the user to express this request by the presence of environment variable "novideo". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* imx6: add Bachmann OT1200 boardChristian Gmeiner2014-10-06-0/+478
| | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the OT1200 series of devices. Following components are used in u-boot: + ethernet + i2c + emmc + gpio For more details see README. Changes v1 > v2 - make use of enable_cspi_clock(..) - fix usage of OUTPUT_40OHM define - added README Changes v2 > v3 - improve spelling in README - added own copy of mx6q_4x_mt41j128.cfg Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* nitrogen6x: Update DDR timings for 2G memory arrangementEric Nelson2014-10-06-12/+12
| | | | | | | | | Update DDR calibration settings based on a larger test set. The initial values were gathered on a small number of boards, and have been found to fail on some boards under load. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* ARM: mx6: gw_ventana: Remove superfluous memset of GD in board_init_fStefan Roese2014-10-01-7/+0
| | | | | | | | | | | | Zeroing GD in board_init_f() is not needed any more. As its now done in crt0.S. The patch that clears the GD in crt0.S is this one: aae2aef9 [arm: Set up global data before board_init_f()] from Simon. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boardsYe.Li2014-09-30-7/+510
| | | | | | | | Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 boardYe.Li2014-09-30-0/+149
| | | | | | | | | | | | | This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. Signed-off-by: Ye.Li <B37916@freescale.com>
* arm: mxs: olinuxino: Fine-tune DRAM configurationMarek Vasut2014-09-29-0/+30
| | | | | | | | | Add fine-tuning for the DRAM configuration according to the DRAM chip datasheet. THis configuration applies to both Hynix HY5DU12622DTP and Samsung K5H511538J-D43 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* arm: mxs: olinuxino: Enable USB only when neededMarek Vasut2014-09-29-2/+14
| | | | | | | | Enable the power to the USB port only when the USB port is really needed. Do not enable the power unconditionally. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* imx: ddr: Move mx6q_4x_mt41j128.cfg to mx6sabresd boardNitin Garg2014-09-22-0/+169
| | | | | | | | | | Provide cgtqmx6eval board its own variant of ddr setup config file. Move board/freescale/imx/ddr/ mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/ as this is was designed for the mx6sabresd board. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-09-22-2112/+1737
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| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-21-0/+4
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| | * ARM: keystone: ddr3: workaround for ddr3a/3b memory issueMurali Karicheri2014-09-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for and executes a software-controlled hard reset.In board_early_init, where logic has been added to identify whether or not the previous reset was a PORz. PLL initialization is skipped in the case of a software-controlled hard reset. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Keegan Garcia <kgarcia@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: atmel: sama5d3xek: add nor flash init functionBo Shen2014-09-19-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add NOR flash hardware init function, including SMC and PIO configuration. Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-09-17-91/+1387
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| * | kconfig: armv8: move CONFIG_ARM64 to KconfigMasahiro Yamada2014-09-16-9/+0
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | vexpress64: kconfig: consolidate CONFIG_TARGET_VEXPRESS_AEMV8A_SEMIMasahiro Yamada2014-09-16-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | We do not have to distinguish CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI from CONFIG_TARGET_VEXPRESS_AEMV8A. Rename the former to the latter. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Steve Rae <srae@broadcom.com> Cc: David Feng <fenghua@phytium.com.cn>
| * | kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-2094/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2014-09-13-1/+1
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| | * | tegra: Convert tegra GPIO driver to use driver modelSimon Glass2014-09-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature. The implementation uses a top-level GPIO device (which has no actual GPIOS). Under this all the banks are created as separate GPIO devices. The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc. Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-09-12-103/+951
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| * | | ls102xa: dcu: Add platform support for DCU on LS1021ATWR boardWang Huan2014-09-08-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the TWR_LCD_RGB card/HDMI options and the common configuration for DCU on LS1021ATWR board. Signed-off-by: Alison Wang <alison.wang@freescale.com>
| * | | video: dcu: Add Sii9022A HDMI Transmitter supportWang Huan2014-09-08-0/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On LS1021ATWR, Silicon's Sii9022A HDMI Transmitter is used. This patch adds the common setting for this chip. Signed-off-by: Alison Wang <alison.wang@freescale.com>
| * | | arm: ls102xa: Add basic support for LS1021ATWR boardWang Huan2014-09-08-0/+627
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS102xA is an ARMv7 implementation. This patch is to add basic support for LS1021ATWR board. One DDR controller DUART1 is used as the console For the detail board information, please refer to README. Signed-off-by: Chen Lu <chen.lu@freescale.com> Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com>
| * | | arm: ls102xa: Add basic support for LS1021AQDS boardWang Huan2014-09-08-0/+834
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS102xA is an ARMv7 implementation. This patch is to add basic support for LS1021AQDS board. One DDR controller DUART1 is used as the console For the detail board information, please refer to README. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | | net: Merge asm/fsl_enet.h into fsl_mdio.hClaudiu Manoil2014-09-08-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fsl_enet.h defines the mapping of the usual MII management registers, which are included in the MDIO register block common to Freescale ethernet controllers. So it shouldn't depend on the CPU architecture but it should be actually part of the arch independent fsl_mdio.h. To remove the arch dependency, merge the content of asm/fsl_enet.h into fsl_mdio.h. Some files (like fm_eth.h) were simply including fsl_enet.h only for phy.h. These were updated to include phy.h instead. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
* | | | imx: Fix warning by building vf610twr_nandStefano Babic2014-09-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d6d07a9b... arm: vf610: add NAND support for vf610twr generates the following warnings: WARNING: no status info for 'vf610twr_nand' WARNING: no maintainers for 'vf610twr_nand'WARNING: no status info for 'vf610twr_nand' This is due to the fact that vf610twr_nand_defconfig has no Maintainer. This patch proposed Alison as Maintainer and fix it. Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Alison Wang <b18965@freescale.com> CC: Stefan Agner <stefan@agner.ch>
* | | | mx6qsabreauto: Staticize when possibleFabio Estevam2014-09-16-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Turn all local symbols into static in order to make sparse happy. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | mx6sxsabresd: Staticize i2c_pad_info1Fabio Estevam2014-09-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c_pad_info1 is only used locally, so it can be made static. Fix the following sparse warning: board/freescale/mx6sxsabresd/mx6sxsabresd.c:160:22: warning: symbol 'i2c_pad_info1' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | arm: vf610: add NAND support for vf610twrStefan Agner2014-09-16-3/+44
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds NAND support for the Vybrid tower system (TWR-VF65GS10) provided by the vf610_nfc driver. Full 16-Bit bus width is supported. Also an aditional config vf610twr_nand is introduced which gets the environment from NAND. However, booting U-Boot from NAND is not yet possible due to missing boot configuration block (BCB). Signed-off-by: Stefan Agner <stefan@agner.ch>
* | | mx6dlsabresd: Use its own DCD tableFabio Estevam2014-09-09-0/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently mx6dlsabresd shares the same DCD settings with the nitrogen board. Provide a DCD configuration file specific to mx6dlsabresd with the settings recommended by the Freescale hardware team. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | imx: ventana: Avoid undefined behaviourThierry Reding2014-09-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The leds array within struct ventana has space for 3 elements, but the setup_board_gpio() function tries to set up 4 GPIOs for LEDs. Recent versions of GCC complain about that: board/gateworks/gw_ventana/gw_ventana.c: In function 'setup_board_gpio': board/gateworks/gw_ventana/gw_ventana.c:987:27: warning: iteration 3u invokes undefined behavior [-Waggressive-loop-optimizations] if (gpio_cfg[board].leds[i]) ^ board/gateworks/gw_ventana/gw_ventana.c:986:2: note: containing loop for (i = 0; i < 4; i++) { ^ Fix this by making the upper bound of the loop match the array size. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | | imx: ventana: add pci fixup for PLX PEX860x switch GPIOTim Harvey2014-09-09-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion. These boards use GPIO on the PLX device as PERST# for the downstream ports thus we assert this when the PLX is enumerated. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | arm: mx6: cm_fx6: add sata supportNikita Kiryanov2014-09-09-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for SATA. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: cm_fx6: use eepromNikita Kiryanov2014-09-09-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use Compulab eeprom module to obtain revision number, serial number, and mac address from the EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: cm_fx6: add i2c supportNikita Kiryanov2014-09-09-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for all 3 I2C busses on Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: cm_fx6: add usb supportNikita Kiryanov2014-09-09-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB and USB OTG host support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: cm_fx6: add ethernet supportNikita Kiryanov2014-09-09-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ethernet support for Compulab CM-FX6 CoM Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: cm_fx6: add nand supportNikita Kiryanov2014-09-09-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | arm: mx6: add support for Compulab cm-fx6 CoMNikita Kiryanov2014-09-09-0/+619
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Compulab CM-FX6 CoM. Support includes MMC, SPI flash, and SPL with dynamic DRAM detection. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | compulab: eeprom: add support for defining eeprom i2c busNikita Kiryanov2014-09-09-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM module what I2C bus the EEPROM is located at. Make cl_eeprom_read() switch to that bus when reading EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | imx: ventana: added cputype env varTim Harvey2014-09-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | imx: ventana: add GW5520 supportTim Harvey2014-09-09-7/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GW5520 has an IMX6Q SoC with 512MB of DDR3, 256MB of NAND flash as well as: * 2x MiniPCIe sockets * 2x USB host sockets * 2x i210 GigE * HDMI out * digital I/O expansion Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | imx: ventana: base SPL MMDC calibration on width and size not boardTim Harvey2014-09-09-80/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IMX6 MMDC calibration registers depend on propagation delay and capacitive loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the board layout varies little in trace-lengths such that propagation delays are irrelevant thus we can simply things by using calibration values obtained from various board layouts based on a common SoC and DDR chip configuration. This eliminates board-model from being needed allowing more flexibility. These values were tested on a large sample size of Gateworks Ventana boards ranging in layout, and memory configuration over the entire temperature range supported. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | imx: ventana: updated notes regarding NAND boot errataTim Harvey2014-09-09-2/+3
| |/ |/| | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-09-2/+40
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| * | sun7i: Add support for Olimex A20-OLinuXino-LIMEFUKAUMI Naoki2014-09-05-0/+38
| | | | | | | | | | | | | | | | | | | | | This patch adds support for Olimex A20-OLinuXino-LIME board. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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