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| * | board/amcc/yucca/flash.c: Fix compile warningWolfgang Denk2009-09-15-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warning: flash.c:919: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
| * | board/amcc/taihu/flash.c: Fix compile warningWolfgang Denk2009-09-15-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warnings: flash.c: In function 'write_word_1': flash.c:696: warning: dereferencing type-punned pointer will break strict-aliasing rules flash.c: In function 'write_word_2': flash.c:1044: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
| * | board/etin/debris/phantom.c: Fix compile errorWolfgang Denk2009-09-15-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build problem caused by commit e84aba13: "Replace BCD2BIN and BIN2BCD macros with inline functions" phantom.c:163: error: redefinition of 'bcd2bin' /home/wd/git/u-boot/work/include/bcd.h:16: error: previous definition of 'bcd2bin' was here phantom.c:168: error: redefinition of 'bin2bcd' /home/wd/git/u-boot/work/include/bcd.h:21: error: previous definition of 'bin2bcd' was here Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Sangmoon Kim <dogoil@etinsys.com>
| * | board/dave/common/flash.c: fix compile warningWolfgang Denk2009-09-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix warning: ../common/flash.c:668: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andrea Marson <andrea.marson@dave-tech.it>
| * | board/esd/cpci750/ide.c: fix compile warningWolfgang Denk2009-09-15-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warning: ide.c:54: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
| * | board/esd/common/flash.c: Fix compile warningWolfgang Denk2009-09-15-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | Fix warning: ../common/flash.c:635: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Stefan Roese <sr@denx.de>
| * muas3001: remove BRG clock node fixup to use common mpc8260 code.Marcel Ziswiler2009-09-10-16/+0
| | | | | | | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com> Acked-by: Heiko Schocher <hs@denx.de>
| * ep8248: add support for device tree and secondary Ethernet interface.Marcel Ziswiler2009-09-10-2/+10
| | | | | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
| * Kirkwood: Sheevaplug: Add kwimage configuration filePrafulla Wadaskar2009-09-10-0/+165
| | | | | | | | Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * ppc4xx: Fix PMC405DE supportMatthias Fuchs2009-09-10-1/+4
| | | | | | | | | | | | | | | | | | This patch fixes PMC405DE support. Patch 85d6bf0b fixed out-of-tree building for this board but the loadpci object did not get linked after that. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-0/+8
| | | | | | | | | | | | | | | | | | | | Some board ports place TEXT_BASE at a location that would cause the RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link. By default we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't explicitly set it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
| * ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-68/+53
| | | | | | | | | | | | | | | | | | | | | | Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
| | | | | | | | | | | | | | | | The ddr_pd_cntl isn't defined in any reference manual and thus we wil remove especially since we set it to 0, which would most likely be its POR value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: sys_eeprom: Fix 'may be used uninitialized' warningAnton Vorontsov2009-09-08-1/+2
| | | | | | | | | | | | | | | | The warning is bogus, so silence it by initializing the 'ret' variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-09-07-2/+1544
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| * | License cleanup: remove unintended "All Rights Reserved" notices.Wolfgang Denk2009-09-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Some files included my old standerd file header which had a "All Rights Reserved" part. As this has never been my intention, I remove these lines to make the files compatible with GPL v.2 and later. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | ppc: Remove -fno-strict-aliasingKumar Gala2009-09-04-1/+1
| | | | | | | | | | | | | | | | | | -fno-strict-aliasing is hidding warnings. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Add PCI support to eNET boardGraeme Russ2009-09-04-0/+96
| | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | i386: Moved PCI from #ifdef to conditional compile for sc520 boardsGraeme Russ2009-09-04-554/+615
| | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structureGraeme Russ2009-09-04-245/+237
| | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | Fixup sc520_spunk boardGraeme Russ2009-09-04-2/+31
| | | | | | | | | | | | | | | | | | | | | | | | Primary intent is to resolve build errors for this board which has been neglected for a very long time. I do not have one of these boards, so I cannot test functionality Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | i386: Misc PCI fixupsGraeme Russ2009-09-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in commit ff4e66e93c1a, regressed by commit 6d7f610b09f8) Cast PCI_ROM_ADDRESS_MASK to u32 Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO Change call to pci_find_class() to pci_find_devices(). This is based on a patch submitted on 1st March 2007 (Patch that fixes the compilation errors for sc520_cdp board) by mushtaq_k This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be specified in the board config file. Dummy values have been added for the SC520 CDP board to enable compilation, but since I do not have one of these, I do know what the values should be Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | i386: Change inline asm global symbols to localGraeme Russ2009-09-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why) Remove use of global names for labels to prevent 'symbol already defined' errors Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
| * | Blackfin: cm-bf548: fix device->stdio_dev falloutMike Frysinger2009-09-02-3/+3
| | | | | | | | | | | | | | | | | | | | | The recent 52cb4d4fb348 commit which renamed device to stdio_dev missed the cm-bf548's video board. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: cm-bf537u: new board portHarald Krapfenbauer2009-09-02-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | The CM-BF537U is similar to the CM-BF537E module, but enough to need its own board port. Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Support for the OpenRD base boardSimon Kagstrom2009-10-03-0/+463
| | | | | | | | | | | | | | | | | | | | | The implementation is borrowed from the sheevaplug board and the Marvell 1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* | | Kirkwood: mv88f6281gtw_ge: Add kwbimage build supportPrafulla Wadaskar2009-10-03-0/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board. To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | | Kirkwood: rd6281a: Add kwbimage build supportPrafulla Wadaskar2009-10-03-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform. To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | | Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix2009-10-03-0/+433
| | | | | | | | | | | | | | | | | | | | | | | | | | | these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* | | Add support for Eukrea CPUAT91 SBCTom Rix2009-10-03-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* | | mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]Wolfgang Denk2009-10-03-1/+1
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | mpc5200, mucmc52, uc101: config cleanupHeiko Schocher2009-10-03-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - As these boards are similiar, collect common config options in manroland/common.h and manroland/mpc52xx-common.h for mpc5200 specific common options for this manufacturer. - add OF support - update default environment Signed-off-by: Heiko Schocher <hs@denx.de> Minor edit of commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | Add Elpida Memory Configuration to mpc5121ads BoardsMartha M Stan2009-10-03-2/+97
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | mpc512x: Streamlined fixed_sdram() init sequence.Martha M Stan2009-10-03-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor cleanup: Re-ordered default_mddrc_config[] to have matching indices. This allows to use the same index "N" for source and target fields; before, we had code like this out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]); which always looked like a copy & paste error because 2 != 3. Also, use NULL when meaning a null pointer. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | mpc8610hpcd: Use common 86xx fdt fixup codePeter Tyser2009-10-03-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | Using the common 86xx fdt fixups removes some board-specific code and should make the mpc8610hpcd easier to maintain in the long run. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: update PCI/PCI-e support codePaul Gortmaker2009-10-03-122/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI/PCI-e support for the sbc8548 was based on an earlier version of what the MPC8548CDS board was using, and in its current state it won't even compile. This re-syncs it to match the latest codebase and makes use of the new shared PCI functions to reduce board duplication. It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and similarly it coalesces the PCI and PCI-e mem into one single TLB. Both PCI-x and PCI-e have been tested with intel e1000 cards under linux (with an accompanying dts change in place) Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: correct local bus SDRAM size from 64M to 128MPaul Gortmaker2009-10-03-8/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the LB SDRAM on this board is 128MB, spanning CS3 and CS4. It was previously only being configured for 64MB on CS3, since that was what the original codebase of the MPC8548CDS had. In addition to setting up BR4/OR4, this also adds the TLB entry for the second half of the SDRAM. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: use I/O accessorsPaul Gortmaker2009-10-03-46/+45
| | | | | | | | | | | | | | | | | | | | | | | | Sweep throught the board specific file and replace the various register proddings with the equivalent I/O accessors. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: remove eTSEC3/4 voltage hackPaul Gortmaker2009-10-03-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | With only eTSEC1 and 2 being brought out to RJ-45 connectors, we aren't interested in the eTSEC3/4 voltage hack on this board Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: enable access to second bank of flashPaul Gortmaker2009-10-03-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sbc8548 has a 64MB SODIMM flash module off of CS6 that previously wasn't enumerated by u-boot. There were already BR6/OR6 settings for it [used by cpu_init_f()] but there was no TLB entry and it wasn't in the list of flash banks reported to u-boot. The location of the 64MB flash is "pulled back" 8MB from a 64MB boundary, in order to allow address space for the 8MB boot flash that is at the end of 32 bit address space. This means creating two 4MB TLB entries for the 8MB chunk, and then expanding the original boot flash entry to 64MB in order to cover the 8MB boot flash and the remainder (56MB) of the user flash. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: cosmetic line re-wrapPaul Gortmaker2009-10-03-4/+8
| | | | | | | | | | | | | | | | | | | | | Fix the extra long lines to be consistent with u-boot coding style. No functional change here. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* | | sbc8548: get_clock_freq is not valid for this boardPaul Gortmaker2009-10-03-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The get_clock_freq() comes from freescale/common/cadmus.c and is only valid for the CDS based 85xx reference platforms. It would be nice if we could read the 33 vs. 66MHz status somehow, but in the meantime, tie it to CONFIG_SYS_CLK_FREQ like all the other non-CDS boards do. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: delete unused MPC8548CDS info carried over from portPaul Gortmaker2009-10-03-57/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a couple defines and PCI bridge quirks related to the PCI backplane of the MPC8548CDS that have no meaning in the context of the port to the sbc8548 board, so delete them. Also, the form factor of the sbc8548 is a standalone board with a single PCI-X and a single PCI-e slot. That pretty much guarantees that it will never be a PCI agent itself, so the host/agent and root complex/end node distinctions have been removed. Similarly, since there is no physical connector mapping to PCI2, so all references of PCI2 in the board support files have been removed as well. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: enable use of PCI network cardsPaul Gortmaker2009-10-03-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Create a board_eth_init to allow a place to hook in the PCI ethernet init after all the eTSEC are up and configured. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-10-03-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010 where max DDR data width supported is 64bit. As a next step the DDR data width initialization would be made more dynamic with more flexibility from the board perspective and user choice. Going forward we would also remove the hardcodings for platforms with onboard memories and try to use the FSL SPD code for DDR initialization. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | sbc8548: replace README with completely new documentPaul Gortmaker2009-10-03-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous README.sbc8548 was pretty much content-free. Replace it with something that actually gives the end user some relevant hardware details, and also lists the u-boot configuration choices. Also in the cosmetic department, fix the bogus line in the Makefile that was carried over from the SBC8560 Makefile, and the typo in the sbc8548.c copyright. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/85xx: Clean up use of LAWAR definesKumar Gala2009-10-03-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | On 85xx platforms we shouldn't be using any LAWAR_* defines but using the LAW_* ones provided by fsl-law.h. Rename any such uses and limit the LAWAR_ to the 83xx platform as the only user so we will get compile errors in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/85xx: Clean up mpc8572DS PCI setup codeKumar Gala2009-10-03-157/+73
| | | | | | | | | | | | | | | | | | | | | Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/85xx: Clean up p2020ds PCI setup codeKumar Gala2009-10-03-117/+33
| | | | | | | | | | | | | | | | | | | | | Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/85xx: Clean up p1_p2_rdb PCI setupKumar Gala2009-10-03-20/+22
| | | | | | | | | | | | | | | | | | | | | | | | General code cleanup to use in/out IO accessors as well as making the code that prints out info sane between board and generic fsl pci code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-10-19 00:54:31 +0000