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* arm: socfpga: Update iomux and pll for c5 socdk RevEDinh Nguyen2016-05-10-36/+36
| | | | | | Update the pinmux and pll configuration for the Cyclone5 RevE or later devkit. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-3/+3
| | | | | | | | | | | | | Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
* ARM: tegra: import latest Jetson TK1 spreadsheetStephen Warren2016-05-04-1/+14
| | | | | | | | | | | | | | | This imports v11 of "Jetson TK1 Development Platform Pin Mux" from https://developer.nvidia.com/embedded/downloads. The new version defines the mux option for the MIPI pad ctrl selection. The OWR pin no longer has an entry in the configuration table because the only mux option it support is OWR, that feature isn't supported, and hence can't conflict with any other pin. This pin can only usefully be used as a GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-3/+3
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Change my mailaddressAndreas Bießmann2016-05-02-6/+6
| | | | | | I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: DRA7: Add ABB setup for all domainsNishanth Menon2016-04-25-0/+3
| | | | | | | | | | | | | ABB should be initialized for all required domains voltage domain for DRA7: IVA, GPU, EVE in addition to the existing MPU domain. If we do not do this, kernel configuring just the frequency using the default boot loader configured voltage can fail on many corner lot units and has been hard to debug. This specifically is a concern with DRA7 generation of SoCs since other than VDD_MPU, all other domains are only permitted to setup the voltages to required OPP only at boot. Reported-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP5/DRA7: Move ABB TXDONE mask to voltage structureNishanth Menon2016-04-25-0/+1
| | | | | | | | | | | ABB TX_DONE mask will vary depending on ABB module. For example, 3630 never had ABB on IVA domain, while OMAP5 does use ABB on MM domain, DRA7 has it on all domains with the exception of CORE, RTC. Hence, move the txdone mask definition over to structure describing voltage domain. Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: hikey: Simplify README instructions.Peter Griffin2016-04-25-46/+49
| | | | | | | | | | | | | | This patch updates and simplifies the hikey README. The old instructions were hard to follow, and convoluted. This patch also updates the link to the mcuimage.bin which was outdated. Using an outdated mcuimage.bin results in the additional a53 cores not coming online when the kernel issues PSCI requests to arm trusted firmware (ATF). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: hisilicon: hikey: Align memory node with upstream kernelPeter Griffin2016-04-25-1/+29
| | | | | | | | | | | | | | | The memory node gets automatically generated by U-Boot in arch_fixup_fdt(), before passing control to the kernel using U-Boots representation of the dram banks. However the upstream kernel uses the memory node to carve-out regions of RAM for various purposes. To make this work without changing arch_fixup_fdt() which will effect many platforms we replicate the upstream memory node layout using the dram banks. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: hisilicon: hikey: Implement reset_cpu() for hikey.Peter Griffin2016-04-25-2/+2
| | | | | | | | | | | | | | | This allows the reset command to reset the board from u-boot. => reset resetting ... INFO: BL1: 0xf9810000 - 0xf9818000 [size = 32768] NOTICE: Booting Trusted Firmware NOTICE: BL1: v1.1(debug):7fb9b0e NOTICE: BL1: Built : 17:06:41, Apr 19 2016 Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: hisilicon: hikey: Enable OF_CONTROL for hikey board.Peter Griffin2016-04-25-0/+3
| | | | | | | | | | | Currently only the serial pl01x driver is using DT, and the other drivers still use platform data but as more DT lands in the upstream kernel the aim is to migrate the other drivers over to DT as well to have a fully DT configured hikey u-boot. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* MAINTAINERS: Add myself as maintainer for hikeyPeter Griffin2016-04-25-0/+6
| | | | | | | | This patch adds myself as maintainer for the hikey U-Boot port. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-25-45/+383
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| * Add initial support for Technexion's PICO-IMX6UL-EMMC boardFabio Estevam2016-04-19-0/+245
| | | | | | | | | | | | | | | | | | | | Add support for Technexion's PICO-IMX6UL-EMMC board. For information about this board, please visit: http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc Signed-off-by: Richard Hu <richard.hu@technexion.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * board: ge: bx50v3: Fix to meet LVDS display power on timingAkshay Bhat2016-04-19-0/+7
| | | | | | | | | | | | | | | | | | On a reset/reboot, the display power needs to be off for atleast 500ms before turning it back on. So add a delay to the boot process to meet the display timing requirement. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * board: ge: bx50v3: Use pwm for display backlightAkshay Bhat2016-04-19-0/+11
| | | | | | | | | | | | | | Setup the LCD backlight brightness control pin to use PWM Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * board: ge: bx50v3: Setup LDB_DI_CLK sourceAkshay Bhat2016-04-19-0/+43
| | | | | | | | | | | | | | | | | | To generate accurate pixel clocks required by the displays we need to set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since PLL5 is disabled on reset, we need to enable PLL5. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * board: ge: bx50v3: Split display setup functionAkshay Bhat2016-04-19-45/+67
| | | | | | | | | | | | | | | | | | B450v3/B650v3 uses single channel LVDS and does not support HDMI. B850v3 uses dual channel LVDS and supports HDMI. Hence split the display setup into two different functions. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * board: ge: bx50v3: Disable unused pinsJustin Waters2016-04-19-0/+10
| | | | | | | | | | | | | | | | | | | | | | Certain pins are not used on the i.MX6, and should have a neutral pad configuration in order to reduce electrical interference on the board. This commit defines these pins with a default value rather than relying on the system defaults. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* | board: Remove overlooked vestiges of "dave" board.Robert P. J. Day2016-04-18-691/+0
| | | | | | | | | | | | | | | | Apparently, all "dave"-related vendor content was removed in commit 5344cc1a82fcc2817d4671696b3939b0dfa4323e; remove remaining directory board/dave/, which consists solely of board/dave/common/flash.c. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | memory: Move TI_AEMIF config to KCONFIGLokesh Vutla2016-04-18-0/+5
| | | | | | | | | | | | | | | | | | | | Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on platforms with AEMIF controller. Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: am57xx: Add support for am572x idk in SPLSteve Kipisz2016-04-18-5/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM572x-IDK board (Industrial Dev Kit) is a board based on TI's AM5728x SOC which has a dual core 1.5GHz A15 processor. This board is a development platform for the Industrial market with: - 2GB of DDR3L - Dual 1Gbps Ethernet - HDMI, - PRU-ICSS - uSD - 16GB eMMC - CAN - RS-485 - PCIe - USB3.0 - Video Input Port - Industrial IO port and expansion connector The link to the data sheet and TRM can be found here: http://www.ti.com/product/AM5728 NOTE: DT support is still pending upstream kernel acceptance but we should be able to get the base system support with this patch. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: am57xx: Update EMIF SDRAM 1 and 3 TimingsSchuyler Patton2016-04-18-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update EMIF data based on recommendations from the now standard TI EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB data sheet Update T_RRD from 5 to 6 based on AM57xx TRM - Minimum number of DDR cycles from activate to ativate for a different bank, minus 1. Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR clocks cycles for which SDRAM must remain in self refresh, minus 1. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | am57x: Move CONS_INDEX to KconfigDaniel Allred2016-04-18-0/+9
|/ | | | | | | | | | - Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and into Kconfig proper. - Edit the relevant am57x configs to remove the now unneeded CONFIG_SYS_EXTRA_OPTIONS. Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: README.sandbox: Update dm test commandJagan Teki2016-04-14-1/+2
| | | | | | | | | Update dm test command with pytest instead of ./test/dm/test-dm.sh Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* xpress: Update <usb/ehci-fsl.h> includeTom Rini2016-04-13-1/+1
| | | | | | | This has been renamed to <usb/ehci-ci.h> some time ago but was missed here. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-13-16/+123
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| * ARM64: zynqmp: Remove netdev.h from board fileMichal Simek2016-04-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including netdev.h is causing compilation warning: + int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); + ^ w+In file included from ../board/xilinx/zynqmp/zynqmp.c:9:0: w+../include/netdev.h:204:41: warning: ‘struct eth_device’ declared inside parameter list [enabled by default] w+../include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] This patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Make DDR detection code work on 32bit systemMichal Simek2016-04-13-3/+3
| | | | | | | | | | | | | | Define u64 types to be usable on 32bit system because of 64bit address and size cells and 32bit shifts in the code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Support systems with more memory banksMichal Simek2016-04-13-12/+120
| | | | | | | | | | | | | | This is example how to change u-boot to support more memory banks read from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-13-29/+1605
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| * | mx6slevk: imximage.cfg: update to fix tINIT3 and tIH-CA violationsTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. There was also a tIH-CA violation and this was resolved by writing the default value in rather than what the script here uses. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6qarm2: imximage_mx6dl.cfg update to fix tINIT3 violationTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mx6sabresd: Remove unneeded enable_lvds() functionFabio Estevam2016-04-03-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_lvds() function only set bits IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT and IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT, but these bits were already set previously inside setup_display(). We can safely remove enable_lvds() then. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx6: Add CCV xPress board supportStefan Roese2016-03-26-0/+650
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the CCV xPress board which is equipped with the i.MX6UL. And provides the following interfaces: - 128MiB DDR - UART - I2C - eMMC (with booting) - Ethernet - USB This patch adds two build targets. One with and one without SPL. The non-SPL version is used for loading U-Boot via USB (imx_usb_loader). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | warp7: Add initial supportFabio Estevam2016-03-26-0/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx6sabresd: Use VESA 1024x768 timingsFabio Estevam2016-03-25-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | VESA 1024x768 results in much more accurate timings. Based on the patch from Soeren Moch for the tbs2910 board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | Merge branch 'next'Stefano Babic2016-03-20-0/+718
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| | * | arm: imx: Add support for GE Bx50v3 boardsAkshay Bhat2016-03-09-0/+718
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for GE B450v3, B650v3 and B850v3 boards. The boards are based on Advantech BA16 module which has a i.MX6D processor. The boards support: - FEC Ethernet - USB Ports - SDHC and MMC boot - SPI NOR - LVDS and HDMI display Basic information about the module: - Module manufacturer: Advantech - CPU: Freescale ARM Cortex-A9 i.MX6D - SPECS: Up to 2GB Onboard DDR3 Memory; Up to 16GB Onboard eMMC NAND Flash Supports OpenGL ES 2.0 and OpenVG 1.1 HDMI, 24-bit LVDS 1x UART, 2x I2C, 8x GPIO, 4x Host USB 2.0 port, 1x USB OTG port, 1x micro SD (SDHC),1x SDIO, 1x SATA II, 1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-04-12-2/+101
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| * | | | arm: mvebu: theadorable: Remove Board name output in checkboardStefan Roese2016-04-12-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This line is not needed, as the board supports DT based probing. And here the "Model:" is already printed: Model: Marvell Armada XP theadorable Board: theadorable One line for the board name is enough. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | arm: mvebu: theadorable: Add PEX-switch detection and reset codeStefan Roese2016-04-12-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the PCIe link for the PEX-switch will not come-up. In this case, the board is not in a usable state. This patch makes sure that in this case a soft-reset is issued. If this soft-reset does not result in the PEX-switch being detected after some soft-reset cycles, an I2C message is sent to the uC to issue a complete power-cycle of the board. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | arm: mvebu: theadorable: Add USB power toggle and tweak USB PHY registerStefan Roese2016-04-12-0/+32
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an USB power toggle for theadorable. Additionally, the USB PHY RX Channel Control 0 Register is changed to fix some issues noticed while accessing some specific USB sticks. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | sunxi: Add defconfig and dts file for Orange Pi One SBCHans de Goede2016-04-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Orange Pi One SBC, is a stripped down version of the popular Orange Pi PC. The one is a H3 based SBC, with 512M of RAM, micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet. The dts is identical to the dts submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | | sunxi: Add INITIAL_USB_SCAN_DELAY Kconfig optionHans de Goede2016-04-12-0/+9
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | Some boards have on board usb devices which need longer than the USB spec's 1 second to connect from board powerup. Add a config option which when non 0 adds an extra delay before the first usb bus scan. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | rpi: remove redundant board filesStephen Warren2016-04-11-40/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that rpi_*defconfig and Kconfig (rather than the config header file) provide the identity of the build, we don't need to separate config headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This requires a tiny number of extra ifdefs in the config header. The only disadvantage of this approach is that the $board/$board_name environment variables aren't as descriptive as they used to be. This isn't really an issue because those only exist to allow scripts to create DTB filenames at runtime. However, the RPi board code already sets $fdtfile to something more accurate based on FW-reported board ID anyway. While at it, unify some Kconfig select options, and add a MAINTAINERS entry for bcm283x too. Partially-suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | board: ti: am57xx: Prevent init_sata() from being called twiceRoger Quadros2016-04-11-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | init_sata() is done as part of scsi_init() in arch/arm/cpu/armv7/omap-common/sata.c so no need to duplicate it here. This seems to fix SATA problems in the kernel when CONFIG_TI_PIPE3 is configured as loadable module. Cc: Cooper Jr., Franklin <fcooper@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* | | ARM: add Raspberry Pi 3 64-bit configStephen Warren2016-04-11-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all Pis so far, the VC FW provides a short stub to set up the ARM CPU before entering the kernel (a/k/a U-Boot for us). This feature is not currently supported by the VC FW when booting in 64-bit mode. However, this feature will likely appear in the near future, and this U-Boot port assumes that such a feature is in place. Without that feature, or a temporary workaround described below, U-Boot will not boot. Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can be used drectly as kernel7.img, in the same way as any other RPi port. The following config.txt is required: # Fix mini UART input frequency, and setup/enable up the UART. # Without this option, U-Boot will not boot, even if you don't care # about the serial console. This option will always be required for # all RPi3 use-cases, unless the PL011 UART is used, which is not # yet supported by rpi_3* builds of U-Boot. enable_uart=1 # Boot in AArch64 (64-bit) mode. # It is possible that a future VC FW will remove the need for this # option, instead auto-setting 32-/64-bit mode based on the "kernel" # filename present on the SD card. arm_control=0x200 Prior to the VC FW providing the ARM boot stub, you can use the following steps to build an equivalent stub into the U-Boot binary: git clone https://github.com/swarren/rpi-3-aarch64-demo.git \ ../rpi-3-aarch64-demo (cd ../rpi-3-aarch64-demo && ./build.sh) Build U-Boot for rpi_3 in the usual way cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed Use u-boot.bin.stubbed as kernel7.img on the Pi SD card. In this case, the following additional entries are required in config.txt: # Tell the FW to load the kernel image at address 0, the reset vector. kernel_old=1 Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | arm: socfpga: sockit: Use more relaxed DRAM timingsMarek Vasut2016-04-10-80/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The currently present DRAM timings generated from GHRD 14.0 did not work on SoCkit rev. D because they were too tight. Load the DRAM timings from GHRD 13.0 which are more relaxed and work with SoCkit rev. D. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | | armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-06-47/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
generated by cgit v1.1 at 2024-11-09 20:14:23 +0000