| Commit message (Collapse) | Author | Age | Lines |
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Properly spell out the whole structure member names when an initialized
varible is instantiated from the struct serial_driver. In case the
structure definition for struct serial_driver undergoes reordering,
there will be no impact on variables defined based on this structure.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: C Nauman <cnauman@diagraph.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <monstr@monstr.eu>
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Fix up the rest of implementations of __stringify().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Kill multiple occurances and redeclaration of MK_STR
in favor of __stringify().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
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After taking with the former maintainer, delete this platform. The
patch is from the former maintainer.
Signed-off-by: Tom Rini <trini@ti.com>
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Under option -munaligned-access, gcc can perform local char
or 16-bit array initializations using misaligned native
accesses which will throw a data abort exception. Fix files
where these array initializations were unneeded, and for
files known to contain such initializations, enforce gcc
option -mno-unaligned-access.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Switch to usign call cc-option for -mno-unaligned-access as
Albert had done previously as that's really correct]
Signed-off-by: Tom Rini <trini@ti.com>
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Due to grown code sizes the TQM85xx boards don't build any more with
some older tool chains (like ELDK 4.2). As these boards have long
reached EOL it seems a waste of effort trying to fix them. The vendor
has agreed to drop support for them, too. So let's get rid of them.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
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The wrong value was set as value of column of DDR memory for ap_sh4a_4a.
10 is the right value. This fixed this problem.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Chin Liang See <clsee@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Tom Trini <trini@ti.com>
Cc: Wolfgang Denx <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
----
v8: Remove no_return attribute for reset_cpu
Based on v2012.10-rc2
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Without usb-serial cable plugged at this stage, some
garbage is seen in UART RX FIFO, which blocks autoboot
progress. The fix makes sure to empty the RX FIFO,
before we wait for user input to interrupt autoboot.
Signed-off-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com>
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Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Marek Vasut <marex@denx.de>
CC: Joe Hershberger <joe.hershberger@gmail.com>
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This patch adds support for the X600 SPEAr600 based board. Its also
the first SPEAr600 board that uses the newly introduced SPEAr600
SPL support. Xloader is not necessary any more. By using the new
"u-boot.spr" make target, one image will generated containing both,
U-Boot SPL (with mkimage header as needed by the SPEAr BootROM, and
the main U-Boot with mkimage header.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
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If while booting the power switch is in OFF position, turn off the fan,
too.
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
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The kmnusa board uses a mv88e6352 switch that is connected to the main
eth interface of the kirkwood. Therefore the switch must be configured
so that the kirkwood's egiga eth inferface can be used.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
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The hardware design of the IB-NAS62x0 causes the SATA activity
LEDs to be on when idle by default. Reverse the polarity of the
activity LEDs in early init.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Cc: Luka Perkov <uboot@lukaperkov.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Luka Perkov <uboot@lukaperkov.net>
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Some boards may differ only in the SDRAM size. This function allows to
fix the size accordingly and we can use the same u-boot binary for both
boards.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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Add support for new board iConnect from Iomega.
More information about the device can be found here:
http://go.iomega.com/en/products/network-storage-desktop/wireless-data-station/network-hard-drive-iconnect/?partner=4735
Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
Tested-by: Wojciech Dubowik <wojciech.dubowik@neratec.com>
Tested-by: Tim Fletcher <tim@night-shade.org.uk>
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This patch adds support for the LaCie boards Network Space v2 (Lite and
Mini). This two boards are derived from the Network Space v2 and a lot
of hardware caracteristics are shared.
- CPU: Marvell 88F6192 800Mhz
- SDRAM memory: 128MB DDR2 200Mhz
- 1 SATA port: internal
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- i2c EEPROM: 512 bytes (24C04 type)
- 2 USB2 ports (Lite only): host and host/device
- 1 push button
- 1 SATA LED (bi-color, blue and red)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
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Support of the MINI2440 board from FriendlyARM from
an old version of u-boot :
http://repo.or.cz/r/u-boot-openmoko/mini2440.git
Currently, supporting only boot from NOR.
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
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This initializes GPIO, without using PFC framework in
board_early_init_f function. It is because it cannot initialize
normally when PFC is used.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM,
Ethernet, and more.
This patch supports the following functions:
- 512MB DDR3-SDRAM
- Serial console (SCIF)
- Ethernet MAC(MII) & PHY(SMSC)
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Do soft power on reset in U-Boot reset command.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Problem:
Linux kernel hangs up when it write a file to NFS mounted directory.
Solution:
Modify bus controller setting for CS4, which connected smsc9221 ethernet
controller.
Detail:
Modify CS4BCR bit[29:28] (IWW[1:0]) from 00 to 01.
Modify CS4BCR bit[20:19] (IWRRD[1:0]) from 00 to 01.
Modify CS4BCR bit[17:16] (IWRRS[1:0]) from 00 to 01.
Modify CS4WCR bit[27:26] (WSW[1:0]) from 10 to 11
Modify CS4WCR bit[25:24] (WHW[1:0]) from 01 to 10
Modify CS4WCR bit[18:16] (WW[2:0]) from 101 to 111
Modify CS4WCR bit[13:11] (SW[2:0]) from 010 to 011
Modify CS4WCR bit[10:7] (WR[3:0]) from 1000 to 1011
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Adjust low level hardware setting in s_init.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.
This patch supports the following functions:
- 512MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SMSC)
- I2C
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
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Do not allow to overwrite it when video is enabled.
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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fecmxc_mii_postcall() is specific to the KSZ9021 PHY on m28evk and
should not be used on mx28evk, which has LAN8270 instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
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The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W
cycle times. However, the NFC clock for this board was set to 66.5 MHz, so using
the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle)
resulted in NF R/W cycle times of 15 ns, hence corrupted NF accesses.
This patch fixes this issue by setting the NFC clock to the highest frequency
complying to the 25-ns NF R/W cycle times specification, i.e. 33.25 MHz.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Gachet <Daniel.Gachet@hefr.ch>
Acked-by: Stefano Babic <sbabic@denx.de>
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FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.
If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.
Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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This patch configure at91sam9x5's EBI drive I/O. Without this, When SD card boot, the nand flash read/write are not stable. Which will cause kernel MTD test fail (Since mainline kernel doesn't configure the EBI register).
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Some of the previous changes caused the code to grow, which causes
errors like
u-boot.lds:76 cannot move location counter backwards (from 4000828c to 40008000)
when building with some older tool chains (like ELDK 4.2).
Adjust the linker script to make fit again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The AP1000 defines a 'get_device' function to determine what board
revision we are on. Inline that checking as it conflicts with the
get_device() in <part.h> and is only used once.
Signed-off-by: Tom Rini <trini@ti.com>
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This file documents when to build for da850evm and when to build for
da850_am18xxevm. It also documents how to write the u-boot.ais file to
persistent storage (such as SPI), in some cases as well as how to write
a recovery image.
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Prabhakar Lad <prabhakar.lad@ti.com>
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Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing. Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: Tom Rini <trini@ti.com>
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Move highly platform dependant code into its own functions to reduce the
number of #ifdefs in lcd_display_bitmap
To avoid breaking the mcc200 board which does not #define
CONFIG_CMD_BMP, this patch also implements bmp_display() for mcc200.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.
This bug was introduced by:
commit 4589728e214958a4e6e011a081a68d360c49d7a5
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Nov 11 08:14:53 2011 -0600
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.
Signed-off-by: Scott Wood <scottwood@freescale.com>
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The P3060 was cancelled before it went into production, so there's no point
in supporting it.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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enum board_slots contained six values, where SLOT1 == 1, SLOT2 == 2, and
so on. This is pointless, so remove it. Also move the lane_to_slot[]
array to the top of the file so that it can be used by other functions.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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In order to figure out which SerDes lane a given Fman port is connected
to, we need a function that maps the fm_port namespace to the srds_prtcl
namespace.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Using the raw value of 0x80000000 directly in the code can
lead to "count the zeros" bugs like that fixed in commit
718e9d13b98 ("MPC85xxCDS: Fix missing LCRR_DBYP bits for
66-133MHz LBC")
Change all existing raw values to use the symbolic value of
LCRR_DBYP instead.
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.
Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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