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* mpc83xx: add support for the MPC8360E-RDKAnton Vorontsov2008-01-10-0/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is MPC8360E based board with: - 256MB fixed SDRAM; - 8MB Intel Strata NOR flash; - StMICRO 64MiB NAND flash; - two 10/100/1000 ethernet ports connected via Broadcom BCM5481 PHYs; - two 10/100 ethernet ports connected via National DP83848 PHYs; - one PCI and one miniPCI slots; - four serial ports (two NS16550-compatible, two UCCs); - four USB ports working through MPC8360E "FHCI" USB controller; - Fujitsu MB86277 graphics controller; - Analog to Digital Converter/Touchscreen controller, AD7843 connected to SPI. Features not supported in this patch are: - StMICRO 64MiB NAND flash (patch sent); - MINT framebuffer initialization (patch is pending); - Fetching production information from the EEPROM via I2C; - FHCI USB; - Two slow UCCs used as RS-485 UARTs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Coding Style cleanup; update CHANGELOGWolfgang Denk2008-01-10-15/+14
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc85xx: Add support for ATUM8548 (updated)robert lazarski2008-01-09-0/+744
| | | | | | | Add support for Instituto Atlantico's ATUM8548 board Signed-off-by: robert lazarski <robertlazarski@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* mpc85xx: Add support for ATUM8548 (updated)robert lazarski2008-01-09-0/+147
| | | | | | Add support for Instituto Atlantico's ATUM8548 board Signed-off-by: robert lazarski <robertlazarski@gmail.com>
* mpc85xx: Add support for SBC8548 (updated)Joe Hamman2008-01-09-0/+149
| | | | | | Add support for Wind River's SBC8548 reference board. Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
* mpc85xx: Add support for SBC8548 (updated)Joe Hamman2008-01-09-0/+897
| | | | | | | Add support for Wind River's SBC8548 reference board. Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com> Signed-off by: Andy Fleming <afleming@freescale.com>
* MPC8568E-MDS: set up QE pario for UART1Anton Vorontsov2008-01-09-0/+7
| | | | | | | To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should be set up appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* MPC8568E-MDS: reset UCCs to use them reliablyAnton Vorontsov2008-01-09-0/+33
| | | | | | | | | | In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset UCCs. p.s Similar code exists in the Linux kernel board file (for capability reasons with older U-Boots), but should be removed some day. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* Reworked FSL Book-E TLB macros to be more readableKumar Gala2008-01-09-933/+786
| | | | | | | | | | | The old macros made it difficult to know what WIMGE and perm bits were set for a TLB entry. Actually use the bit masks for these items since they are only a single bit. Also moved the macros into mmu.h out of e500.h since they aren't specific to e500. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-usbWolfgang Denk2008-01-09-0/+1
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| * Merge git://www.denx.de/git/u-bootMarkus Klotzbuecher2008-01-09-4869/+13325
| |\ | | | | | | | | | | | | | | | Conflicts: board/tqm5200/tqm5200.c
| * | TQM5200: Call usb_cpu_init() during board initMarian Balakowicz2007-10-31-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_cpu_init() configures GPS USB pins, clocks, etc. and is required for proper operation of kernel USB subsystem. This setup was previously done in the kernel by the fixup code which is being removed, thus low level init must be done by U-boot now. Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
* | | fix comments with new drivers organizationMarcel Ziswiler2008-01-09-3/+3
| |/ |/| | | | | Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | Improve configuration of FPGA subsystemMatthias Fuchs2008-01-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the FPGA subsystem configuration through the CONFIG_FPGA bitmask configuration option. See README for the new options: CONFIG_FPGA, CONFIG_FPGA_<vendor>, CONFIG_FPGA_<family> Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | Coding Style cleanup, update CHANGELOGWolfgang Denk2008-01-09-130/+124
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2008-01-09-0/+1753
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| * \ Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2008-01-07-2050/+11791
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| * | | Correction patchPeter Pearse2007-11-15-357/+222
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| * | | Add apollon board supportPeter Pearse2007-11-09-0/+1888
| | | | | | | | | | | | | | | | Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-01-09-588/+457
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| * | | | mpc83xx: fix missed pci_hose -> hose conversion for new libfdt codeKim Phillips2008-01-08-4/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: rm remaining FLAT_TREE codeKim Phillips2008-01-08-109/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ..in board pci.c files Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: remove FLAT_TREE codeKim Phillips2008-01-08-104/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | need to rm it from pci code, too! Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: convert to using do_fixup_*()Kim Phillips2008-01-08-90/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | convert to using simpler mpc85xx style fdt update code; streamline by eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm the old school FLAT_TREE code from 83xx (since the sbc8349 was just converted over to using libfdt). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | sbc8349: migrate board to libfdtPaul Gortmaker2008-01-08-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds libfdt support code for the Wind River sbc8349 board. Parallel of commit 3fde9e8b22cfbd7af489214758f9839a206576cb for the other Freescale 83xx boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | | | sbc8349: Remove board specific ECC codePaul Gortmaker2008-01-08-327/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ECC code is now shared for all 83xx boards, so remove board specific one. See commit daab8c67d2defef73dc26ab07f0c3afd1b05d019 for reference. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | | | mpc83xx: supress compiler warningKim Phillips2008-01-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpc8360emds.c: In function ‘ft_board_setup’: mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: fix remaining fdt_find_node_by_path referencesKim Phillips2008-01-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rename to fdt_path_offset Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: mpc8360 rev.2.1 erratum 2: replace rgmii-id with rgmii-rxidKim Phillips2008-01-08-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type properties in the device tree so the PHY gets configured for internal delay on RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc83xx: Add the support of MPC837xEMDS boardDave Liu2008-01-08-0/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC837xEMDS board support: * DDR2 400MHz hardcoded and SPD init * Local bus NOR Flash * I2C, UART, MII and RTC * eTSEC RGMII * PCI host Signed-off-by: Dave Liu <daveliu@freescale.com>
| * | | | MPC8360E-MDS: configure and enable second UARTAnton Vorontsov2008-01-08-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Despite user manual, BCSR9.7 is negated (high) on HRST, so UART2 is disabled. Fix that and configure QE pins properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | | | | Merge branch 'lwmon5-no-ocm'Stefan Roese2008-01-09-1/+1
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| * | | | | ppc4xx: Change LWMON5 to not use OCM for init-ram and POST anymoreStefan Roese2008-01-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch configures the LWMON5 port to use d-cache as init-ram and the unused GPT0_COMP6 as POST WORD storage. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | ppc4xx: assign PCI interrupts on seuqoia boardsMatthias Fuchs2008-01-09-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some operating systems rely on assigned PCI interrupts. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | | | | ppc4xx: Update PLB/PCI divider for PMC440 boardMatthias Fuchs2008-01-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the PLB/PCI divider when running at 400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | | | | Merge branch 'inka4x0-ng' of /home/m8/git/u-boot/Wolfgang Denk2008-01-08-463/+113
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| * | | | | [INKA4x0] NG hardware: flash supportMarian Balakowicz2007-11-15-433/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disabled and remove inka4x0 custom flash driver, use CFI flash driver instead. Signed-off-by: Marian Balakowicz <m8@semihalf.com>
| * | | | | [INKA4x0] NG hardware: SDRAM supportMarian Balakowicz2007-11-15-26/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for three new DDR chips that may be present on a NG INKA4x0 hardware: HYB25D512160BF-5, K4H511638C-7CB3, T46V32M16BN-6IT. Cleanup board/inka4x0/mt48lc16m16a2-75.h file. Signed-off-by: Marian Balakowicz <m8@semihalf.com>
| * | | | | [INKA4x0] NG hardware: platform code updateMarian Balakowicz2007-11-15-4/+4
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Cleanup compile warnings. - Add missing '\0' in default environment. - Increase CFG_MONITOR_LEN to 256 KiB. - Add required CFG_USE_PPCENV. Signed-off-by: Marian Balakowicz <m8@semihalf.com>
* | | | | Merge branch 'katmai-ddr-gda'Stefan Roese2008-01-05-1/+13
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| * | | | | ppc4xx: Update Katmai/44x_spd_ddr2.c code for optimal DDR2 setupStefan Roese2008-01-05-1/+13
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Katmai the complete auto-calibration somehow doesn't seem to produce the best results, meaning optimal values for RQFD/RFFD. This was discovered by GDA using a high bandwidth scope, analyzing the DDR2 signals. GDA provided a fixed value for RQFD, so now on Katmai "only" RFFD is auto-calibrated. This patch also adds RDCC calibration as mentioned on page 7 of the AMCC PowerPC440SP/SPe DDR2 application note: "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | ppc4xx: Remove sdram.h from PMC440 boardMatthias Fuchs2008-01-04-505/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | | | ppc4xx: use common denali core defines and data eye search code for PMC440Matthias Fuchs2008-01-04-338/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | | | ppc4xx: More cleanup for esd's LCD codeMatthias Fuchs2008-01-04-20/+18
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | | | ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Korat boardLawrence R. Johnson2008-01-04-108/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Larry Johnson <lrj@acm.org>
* | | | | ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Sequoia boardLawrence R. Johnson2008-01-04-30/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note: this patch changes the configuration of some GPIO registers: Register Old Value New Value --------------- ---------- ---------- DCR GPIO0_TCR 0x0000000F 0x0000F0CF DCR GPIO0_TSRH 0x55005000 0x00000000 DCR GPIO1_TCR 0xC2000000 0xE2000000 DCR GPIO1_TSRL 0x0C000000 0x00200000 DCR GPIO1_ISR2L 0x00050000 0x00110000 Signed-off-by: Larry Johnson <lrj@acm.org>
* | | | | PPC4xx: Remove sdram.h from board/lwmon5Larry Johnson2008-01-04-505/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These definitions are now in "include/ppc440.h". Signed-off-by: Larry Johnson <lrj@acm.org>
* | | | | PPC4xx: Use common code for LWMON5 board SDRAM supportLarry Johnson2008-01-04-337/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch also modifies the functionality of the code so that the data-eye search is now done with with the cache disabled. Signed-off-by: Larry Johnson <lrj@acm.org>
* | | | | PPC4xx: Remove sdram.h from board/amcc/sequoiaLarry Johnson2008-01-04-505/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These definitions are now in "include/ppc440.h". Signed-off-by: Larry Johnson <lrj@acm.org>
* | | | | PPC4xx: Use common code for Sequoia board SDRAM supportLarry Johnson2008-01-04-338/+6
|/ / / / | | | | | | | | | | | | Signed-off-by: Larry Johnson <lrj@acm.org>
generated by cgit v1.1 at 2024-09-05 00:47:24 +0000