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* | | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-26-1/+112
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| * | | armv8: ls1043aqds: add IFC fixup in case QSPI is enabledQianyu Gong2016-07-26-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QSPI and IFC are pin-multiplexed on LS1043AQDS board. If QSPI is enabled, IFC would not be initialized correctly. So disable the IFC node for Linux. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implementionHongbo Zhang2016-07-26-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS, LS1021aTWR. Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com> Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | armv8: ls1043aqds: Update MAINTAINERSYork Sun2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add ls1043aqds_lpuart_defconfig to file list. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | armv8: ls2080aqds: Update MAINTAINERSYork Sun2016-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add ls2080aqds_qspi_defconfig to file list. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | arm: ls1021atwr: Add SD secure boot targetSumit Garg2016-07-26-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SD secure boot target for ls1021atwr. Implement board specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | SECURE_BOOT: Enable chain of trust in SPL frameworkSumit Garg2016-07-26-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Override jump_to_image_no_args function to include validation of u-boot image using spl_validate_uboot before jumping to u-boot image. Also define macros in SPL framework to enable crypto operations. Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | ARM64: evb-rk3399: add a README for this board setupKever Yang2016-07-25-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a README to guide people flash the ATF and U-Boot with Rockchip tools to bring up to board. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | ARM64: rockchip: add support for rk3399 SoC based evbKever Yang2016-07-25-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | board: move all the rockchip board in one folderKever Yang2016-07-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'evb_rk3036' and 'kylin' is not a vendor name, let's replace them to 'rockchip' which is a real _vendor_ name, and meet the architecure 'board/<vendor>/<board-name>/'. More boards from rockchip like evb_rk3288, evb_rk3399 will comes later. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Eddie Cai <eddie.cai.kernel@gmail.com>
* | | | rockchip: add basic support for evb-rk3288 boardXu Ziyuan2016-07-25-0/+43
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc). evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-07-25-1/+4
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| * | | mtd: nand: Add the sunxi NAND controller driverBoris Brezillon2016-07-24-1/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | | sandbox: Add instructions about building on 32-bit machinesSimon Glass2016-07-25-0/+3
|/ / | | | | | | | | | | | | | | Sandbox is built with 64-bit ints by default. This doesn't work properly on 32-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | gdsys: Drop print_fpga_state functionTom Rini2016-07-22-25/+4
| | | | | | | | | | | | | | | | | | | | On most platforms the print_fpga_state function is never called. Only on dlvision-10g do we, so in that case inline it. Drop it from everywhere else to avoid extra strings. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | igep00x0: Falcon modeLadislav Michl2016-07-22-0/+12
| | | | | | | | | | | | | | | | Implement spl_start_uboot to let Falcon mode work. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* | igep00x0: generate default mtdparts according NAND chip usedLadislav Michl2016-07-22-0/+18
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | igep00x0: runtime flash detectionLadislav Michl2016-07-22-18/+53
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | igep00x0: remove unused empty function omap_rev_string()Ladislav Michl2016-07-22-8/+0
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | igep00x0: remove useless setup_net_chip declarationLadislav Michl2016-07-22-2/+0
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | igep00x0: reorder lan9221 code to remove ifdefsLadislav Michl2016-07-22-24/+17
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | igep00x0: move sysinfo into C fileLadislav Michl2016-07-22-18/+18
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | mtd: OneNAND: allow board init function failLadislav Michl2016-07-22-4/+12
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | armv7: make gpmc_cfg constLadislav Michl2016-07-22-5/+6
| | | | | | | | | | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-07-21-1/+108
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| * | powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg2016-07-21-1/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. For secure boot target from NAND, the text base for SPL is kept same as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would be different. The virtual address 0xFFFx_xxxx needs to be mapped to physical address 0xBFFx_xxxx. Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 and update DCFG SCRTACH1 register with location of Header required for secure boot. The changes are similar to commit 467a40dfe35f48d830f01a72617207d03ca85b4d powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is only 256K and thus SPL framework is used. The changes are only applicable for SPL U-Boot running out of CPC SRAM and not the next level U-Boot loaded on DDR. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPLSumit Garg2016-07-21-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-07-21-0/+24
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| * | | ARM: tegra: p2371-2180: A03 board PMIC config updateStephen Warren2016-07-21-0/+24
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rev A03 of P2180 requires some PMIC programming adjustments, yet the PMIC's own OTP has not been updated. Consequently, U-Boot must make these changes itself. NVIDIA's syseng team has confirmed that these changes can be enabled on all board revisions without issue. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Revert "stm32: Change USART port to USART6 for stm32f746 discovery board"Tom Rini2016-07-21-6/+7
|/ / | | | | | | | | | | | | | | | | | | Per Vikas' request, the problem this commit is supposed to be solving is something he doesn't see and further this introduces additional hardware requirements. This reverts commit 4b2fd720a7b2f78c42d1565edf4c67f378c65440. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-19-45/+65
|\ \ | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
| * | ARMv8/ls1043ardb: Integrate FSL PPAHou Zhiqiang2016-07-19-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PPA use PSCI to make secondary cores bootup. So when PPA was enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method between PSCI and spin-table. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: mmu: Add support of non-identical mappingYork Sun2016-07-15-9/+18
| | | | | | | | | | | | | | | | | | | | | Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com>
| * | armv8: Move secure_ram variable out of generic global dataYork Sun2016-07-15-35/+40
| | | | | | | | | | | | | | | | | | | | | Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure. Signed-off-by: York Sun <york.sun@nxp.com>
* | | Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-07-15-31/+68
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| * | | sunxi: Add defconfig and dts file for the Orange Pi Lite SBCHans de Goede2016-07-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM, micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector, sdio attached rtl8189ftv wifi and an ir receiver. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Use BROM stored boot_media value to determine our boot-sourceHans de Goede2016-07-15-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Remove some unnecessary #ifdefsHans de Goede2016-07-15-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always define CONFIG_MISC_INIT_R on sunxi and misc_init_r is never called in the spl, so the linker will optimize it and parse_spl_header(), of which it is the only caller, away. On the tests I've done (Orange Pi PC build) the SPL actually becomes 8 bytes smaller with this patch. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add support for multiple ethadrr-essesHans de Goede2016-07-15-16/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we fill ethaddr with a fixed unique address based on the SoCs serial (from the sid) to make sure that boards which use the integrated emac / gmac get a fixed mac rather then a random one. On some boards the wifi does not come with a fixed mac either, so we need to also set eth1addr. This commit changes the ethaddr setting code to check for ethernet%d aliases (as fdt_fixup_ethernet does) and set an ethaddr variable for all present aliases. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: FEL - Add the ability to recognize and auto-import uEnv-style dataBernhard Nortmann2016-07-15-8/+21
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch converts one of the "reserved" fields in the sunxi SPL header to a fel_uEnv_length entry. When booting over USB ("FEL mode"), this enables the sunxi-fel utility to pass the string length of uEnv.txt compatible data; at the same time requesting that this data be imported into the U-Boot environment. If parse_spl_header() in the sunxi board.c encounters a non-zero value in this header field, it will therefore call himport_r() to merge the string (lines) passed via FEL into the default settings. Environment vars can be changed this way even before U-Boot will attempt to autoboot - specifically, this also allows overriding "bootcmd". With fel_script_addr set and a zero fel_uEnv_length, U-Boot is safe to assume that data in .scr format (a mkimage-type script) was passed at fel_script_addr, and will handle it using the existing mechanism ("bootcmd_fel"). Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2016-07-15-0/+7
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| * | | sandbox: Add a new sandbox_spl boardSimon Glass2016-07-14-0/+7
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to build SPL for sandbox. It provides additional build coverage and allows SPL features to be tested in sandbox. However it does not need worthwhile to always create an SPL build. It nearly doubles the build time and the feature is (so far) seldom used. So for now, create a separate build target for sandbox SPL. This allows experimentation with this new feature without impacting existing workflows. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | stm32: Change USART port to USART6 for stm32f746 discovery boardToshifumi NISHINAGA2016-07-14-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is to remove a halt at about 200KiB while sending a large(1MiB) binary to a micro controller using USART1. USART1 is connected to a PC via an on-board ST-Link debugger that also functions as a USB-Serial converter. However, it seems to loss some data occasionally. So I changed the serial port to USART6 and connected it to the PC using an FTDI USB-Serial cable, therefore the transmission was successfully completed. Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
* | | stm32: Add SDRAM support for stm32f746 discovery boardToshifumi NISHINAGA2016-07-14-9/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SDRAM support for stm32f746 discovery board. This patch depends on previous patch. This patch is based on STM32F4 and emcraft's[1]. [1]: https://github.com/EmcraftSystems/u-boot Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
* | | arm: am4x: add U-Boot FIT signing and SPL image post-processingMadan Srinivas2016-07-14-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the SPL build procedure for AM437x high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed (and optionally encrypted) with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | arm: omap5: add U-Boot FIT signing and SPL image post-processingAndreas Dannenberg2016-07-14-0/+17
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-07-12-0/+134
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| * | x86: Add Advantech SOM-DB5800/SOM-6867 supportGeorge McCollister2016-07-12-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Advantech SOM-DB5800 with the SOM-6867 installed. This is very similar to conga-qeval20-qa3-e3845 in that there is a reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867) installed. Currently supported: - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on SOM-DB5800. - 4x USB 2.0 (EHCI) - Video - SATA - Ethernet - PCIe - Realtek ALC892 HD Audio Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO HDA_SDI0 is set in DT to enable HD Audio codec. Pin defaults for codec pin complexs are not changed. Not supported: - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500) - USB 3.0 (XHCI) - TPM Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: conga-qeval20-qa3: Add support for internal UARTStefan Roese2016-07-12-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to enable and use the internal BayTrail UART instead of the one integrated in the Super IO Winbond chip. For this, a 2nd defconfig file is added. This is useful for tests done for the congatec SoM used on baseboards without such a Super IO chip. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-02 17:16:23 +0000