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* OMAP3: igep00x0: add SPL support for IGEP-based boardsJavier Martinez Canillas2012-09-01-68/+82
| | | | | | | This patch adds SPL support for IGEP-based boards. Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
* OMAP3: igep00x0: Add config option to choose flash storage memoryJavier Martinez Canillas2012-09-01-0/+8
| | | | | | | | IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Add a configuration option for to choose which memory to use. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
* am335x_evm: CPSW supportChandan Nath2012-09-01-0/+91
| | | | | | | | | This patch adds board-specific initialization for CPSW on TI AM335X based boards. Tested on BeagleBone. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split board-specific part into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am335x_evm: read the on-board EEPROMIlya Yanok2012-09-01-2/+70
| | | | | | | | Read the on-board EEPROM during startup to detect the version of the board we are running on (as for now only BeagleBone vs EVM detection is supported). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: pin mux defintions for CPSW switchChandan Nath2012-09-01-0/+47
| | | | | | | | | This patch adds pin mux settings for CPSW switch found on TI AM335X based boards (MII and RGMII modes). Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split pinmux into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* beagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3Peter Meerwald2012-09-01-0/+4
| | | | Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
* omap: am335x_evm: enable i2c1 channelSteve Sakoman2012-09-01-0/+14
| | | | | | | This patch sets up pinmux, enables fclk, and defines CONFIG_I2C_MULTI_BUS Signed-off-by: Steve Sakoman <steve@sakoman.com>
* beagle: removed unused pr_debug #definePeter Meerwald2012-09-01-2/+0
| | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
* beagle: make get_expansion_id(), get_board_revision(), beagle_display_init() ↵Peter Meerwald2012-09-01-3/+3
| | | | | | static Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
* da850/omap-l138: Fix NAND flash timingsLad, Prabhakar2012-09-01-5/+5
| | | | | | | | | | | | | | | Though Commit id a3f88293ddd13facd734769c1664d35ab4ed681f (da850evm: setup the NAND flash timings) has configured the AEMIF timings, they are not exactly in sync with the timings used in Linux. Linux is configuring the timing register as 0x08222204, where as currently it configured to 0x00100084 in U-Boot. This issue was found out when support for NAND SPL is added in U-Boot. Without this patch U-Boot does not come up with SPL. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVMRajashekhara, Sudhakar2012-09-01-1/+11
| | | | | | | | | | | | | AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When GP0[11] is low, the SD0 interface will not work, but NOR flash will. When GP0[11] is high, SD0 will work but NOR flash will not. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar2012-09-01-0/+32
| | | | | | | | | This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* omap: am335x_evm: remove unused definitionsSteve Sakoman2012-09-01-5/+0
| | | | | | | | | | UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN are defined inn evm.c but not used. Also removes unnecessary include of serial.h PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used. Signed-off-by: Steve Sakoman <steve@sakoman.com>
* OMAP3: mcx: read hot-water-button after resetStefano Babic2012-09-01-0/+23
| | | | | | | Detect hot-water-button to start a differnt image. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
* OMAP3: mcx: set pinmux for uart4Stefano Babic2012-09-01-3/+8
| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
* arm: omap3: cm-t35: minor comment and printf changeIgor Grinberg2012-09-01-2/+2
| | | | | | | Fix the comment to reflect the actual function call time. Change the printf message to look nicer in the context it might be printed. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* hawkboard/omapl-138: Add support for generating ais image for hawkboardSughosh Ganu2012-09-01-0/+4
| | | | | | | | | Parameters used for configuring certain SoC peripherals are parsed from the cfg file and appended as part of the ais image's header. The u-boot-spl.ais generated is flashed separately to the nand, so do not delete the file after generation of u-boot.ais. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* Consolidate bootcount code into drivers/bootcountStefan Roese2012-09-01-109/+0
| | | | | | | | | | | | | | | | | | | This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mpc52xx: remove o2dnt boardAnatolij Gustschin2012-09-01-821/+0
| | | | | | | Remove old o2dnt board without OF support. New support for this board is added by the previous patch, O2I configuration. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* mpc52xx: add common o2dnt and o2dnt2 support and configurationsAnatolij Gustschin2012-09-01-0/+434
| | | | | | | | Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* rename EB+MCF-EV123 to its current marketing name EB+CPU5282Jens Scharsig2012-08-09-0/+0
| | | | | | | | | * rename board directory to eb_cpu5282 * rename EB+MCF-EV123_.*config to eb_cpu5282_.*config * add Maintainer for EB+CPU5282 board * rename prompt Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* powerpc/sgmii: To support PHY link state auto detect in SGMII modeHongtao Jia2012-08-08-8/+49
| | | | | | | | | | | | | | | PHYs on SGMII riser card are used in SGMII mode with different external IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type under ethernet node should be updated. Otherwise the PHY interrupt can not be handled therefor PHY link state change can not be auto detected. For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed but it's still be kept to guarantee the sgmii mode could work with old device tree. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p2041: configure the CPLD lane_mux according to RCWShaohui Xie2012-08-08-0/+39
| | | | | | | | | | | | | | | | | | | Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg is 0xc, CPLD supports SATA by default, we should re-configure the lane muxing according to RCW, which indicates what SerDes protocol it is running. Default lane muxing map is as below: Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg; Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg; Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2 and bit 3 respectively. Default value of these bits for lane muxing is '1', we should set or clear these bits accoring to RCW. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1022ds: fix DIU/LBC switching with NAND enabledTimur Tabi2012-08-08-8/+74
| | | | | | | | | | | In order for indirect mode on the PIXIS to work properly, both chip selects need to be set to GPCM mode, otherwise writes to the chip select base addresses will not actually post to the local bus -- they'll go to the NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM mode before switching to indirect mode. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1022ds: add support for SPI and SD bootMatthew McClintock2012-08-08-0/+18
| | | | | | | | | | | | | | | | | | Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/82xx: add SDRAM detection for km82xxGerlando Falauto2012-07-31-2/+49
| | | | | | | | | | | | This patch adds SDRAM detection feature to km82xx boards. To enable this feature, define CONFIG_SYS_SDRAM_LIST as the initializer for an array of struct sdram_conf_s. These structs will expose the bitfields within registers PSDMR and OR1 which have to be different between configurations; common bitfields will be defined, as usual, within CONFIG_SYS_PSDMR and CONFIG_SYS_OR1. If CONFIG_SYS_SDRAM_LIST is not defined, then the usual behavior is retained. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-07-31-11/+78
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: km/common: remove printfs for i2c deblocking code CONFIG: SMDK5250: I2C: Enable I2C I2C: Add support for Multi channel I2C: Modify the I2C driver for EXYNOS5 I2C: Move struct s3c24x0_i2c to a common place. EXYNOS: PINMUX: Add pinmux support for I2C EXYNOS5: define EXYNOS5_I2C_SPACING EXYNOS: Add I2C base address. EXYNOS: CLK: Add i2c clock mx6qsabrelite: add i2c multi-bus support imx-common: add i2c.c for bus recovery support i.mx53: add definition for I2C3_BASE_ADDR i.mx: iomux-v3.c: move to imx-common directory i.mx: iomux-v3.h: move to imx-common include directory iomux-v3: remove include of mx6x_pins.h mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support mxc_i2c: add bus recovery support mxc_i2c: prep work for multiple busses support mxc_i2c: add i2c_regs argument to i2c_imx_stop mxc_i2c: add retries mxc_i2c: check for arbitration lost mxc_i2c: change slave addr if conflicts with destination. mxc_i2c: don't disable controller after every transaction mxc_i2c: place i2c_reset code inline mxc_i2c: place imx_start code inline mxc_i2c: remove redundant read mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state mxc_i2c.c: code i2c_probe as a 0 length i2c_write mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write mxc_i2c: create i2c_init_transfer mxc_i2c: clear i2sr before waiting for bit mxc_i2c: create tx_byte function mxc_i2c: remove ifdef of CONFIG_HARD_I2C mxc_i2c: fix i2c_imx_stop i2c: deblock i2c bus also if accessed before realocation Signed-off-by: Wolfgang Denk <wd@denx.de>
| * km/common: remove printfs for i2c deblocking codeHolger Brunck2012-07-31-3/+0
| | | | | | | | | | | | | | | | | | This code will also be used before reallocation and during this time we are not allowed to do these printings. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de>
| * CONFIG: SMDK5250: I2C: Enable I2CRajeshwari Shinde2012-07-31-1/+29
| | | | | | | | | | | | | | | | | | | | | | This enables I2C support on smdk5250. Pinmux setting moved to board file to avoid repeated setting of gpio lines. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * mx6qsabrelite: add i2c multi-bus supportTroy Kisky2012-07-31-4/+46
| | | | | | | | | | | | | | This includes bus recovery support. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Jason Liu <r64343@freescale.com>
| * i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-31-3/+3
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-microblazeWolfgang Denk2012-07-31-71/+8
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-microblaze: microblaze: Wire up SPI driver spi: microblaze: Adds driver for Xilinx SPI controller microblaze: intc: Clear interrupt code microblaze: Call serial multi initialization microblaze: Move __udelay implementation microblaze: Remove extern from board.c microblaze: Wire up dts configuration fdt: Add board specific dts inclusion microblaze: Move individual board linker scripts to common script in cpu tree. microblaze: Add gpio.h microblaze: Add missing undefs for UBI and UBIFS microblaze: Expand and correct configuration comments microblaze: Enable ubi support microblaze: Avoid compile error on systems without cfi flash microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * microblaze: Wire up dts configurationStephan Linz2012-07-10-0/+8
| | | | | | | | | | | | | | | | | | - enable OF control and embedded OF - set default device tree file name to 'microblaze' - add CPP to dtc proxy: board/xilinx/dts/microblaze.dts - add an empty but processable dts for microblaze-generic Signed-off-by: Stephan Linz <linz@li-pro.net>
| * microblaze: Move individual board linker scripts to common script in cpu tree.Michal Simek2012-07-09-71/+0
| | | | | | | | | | | | Unification for all microblaze boards. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | Merge branch 'next' of git://git.denx.de/u-bootWolfgang Denk2012-07-30-0/+10598
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.denx.de/u-boot: MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c doc: cleanup - move board READMEs into respective board directories net: sh_eth: add support for SH7757's GETHER net: sh_eth: modify the definitions of regsiter net: sh_eth: add SH_ETH_TYPE_ condition net: sh_eth: clean up for the SH7757's code net: fec_mxc: Fix MDC for xMII net: fec_mxc: Fix setting of RCR for xMII net: nfs: make NFS_TIMEOUT configurable net: Inline the new eth_setenv_enetaddr_by_index function net: allow setting env enetaddr from net device setting net/designware: Consecutive writes to the same register to be avoided CACHE: net: asix: Fix asix driver to work with data cache on net: phy: micrel: make ksz9021 phy accessible net: abort network initialization if the PHY driver fails phylib: phy_startup() should return an error code on failure net: tftp: fix type of block arg to store_block Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | doc: cleanup - move board READMEs into respective board directoriesWolfgang Denk2012-07-29-0/+10598
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | | Minor Coding Style Cleanup.Wolfgang Denk2012-07-22-3/+0
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | BC3450 board: Remove unused CONFIG_SYS_CPU definitionWolfgang Denk2012-07-22-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This fixes: cmd_bc3450.c:55:0: warning: "CONFIG_SYS_CPU" redefined [enabled by default] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | | BC3450 board: change debug code to using debug()Wolfgang Denk2012-07-22-9/+3
| | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | | ARM: OMAP4: PANDA: Add rest of the USB module pads to essentialsSRICHARAN R2012-07-20-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 1a89a217f5c5ab3645c80c1247e8911a8b5ad491 we moved most of the required pads and mux data for USB to the essential list so that later on we could NOT enable anything that wasn't essential unless otherwise configured. This was however missing a few pandaboard-specific parts which left for example USB ethernet non-functional. Tested this on OMAP4430 ES2.2, OMAP4460 ES1.1 PANDA boards. (Reworded by Tom Rini to be more precise about what the problem was) Signed-off-by: R Sricharan <r.sricharan@ti.com> Tested-by: Gary Thomas <gary@mlbassoc.com> Tested-by: Tom Rini <trini@ti.com>
* | | Blackfin: easylogo: add lzma logosMike Frysinger2012-02-03-22/+55
|/ / | | | | | | | | | | | | | | | | | | The bf527-ezkit boards are getting too big to fit into their reserved flash space, so we need to use a lzma compressed logo. Since the video driver code is very similar, add lzma compressed support to all of the Blackfin video drivers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | mx28evk: Add I2C supportFabio Estevam2012-07-11-0/+3
| | | | | | | | | | | | | | | | | | Add I2C support. Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* | mx6qsabrelite: add i2c supportTroy Kisky2012-07-11-0/+11
| | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | Minor Coding Style cleanupWolfgang Denk2012-07-10-2/+0
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | tegra: trimslice: set up serial flash pinmuxStephen Warren2012-07-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | When Trimslice is booted from serial flash, the boot ROM does this, so U-Boot doesn't need to. However, booting from the SD slot for recovery purposes, the boot ROM does not set up the pinmux for serial flash. Add code to U-Boot to set this up, so that an SD-based recovery U-Boot image can upgrade the U-Boot in serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: add pin_mux_spi() board initialization functionStephen Warren2012-07-09-0/+7
| | | | | | | | | | | | | | | | Boards can override this to set up the pinmux correctly to access serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switchesTom Warren2012-07-09-6/+6
| | | | | | | | | | | | | | | | | | Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | tegra: Add Tamonten Evaluation Carrier supportThierry Reding2012-07-09-0/+108
| | | | | | | | | | | | | | | | | | | | | | The Tamonten Evaluation Carrier is an evaluation board for the Tamonten processor board. More information is available here: http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.html Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Use SD write-protect GPIO on TamontenThierry Reding2012-07-09-1/+3
| | | | | | | | | | | | | | | | | | GPIO PI6 can be used to obtain the write-protect status of an SD card inserted into the SD slot. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Implement gpio_early_init() on TamontenThierry Reding2012-07-09-0/+8
| | | | | | | | | | | | | | | | | | | | | | The PI4 GPIO is used on Tamonten to reset carrier board peripherals. Power sequencing hardware on the carrier pulls the reset low before powering up the Tegra, and the CPU is supposed to signal readiness, and therefore bring peripherals out of reset by pulling PI4 high. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-12 02:47:40 +0000