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| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-07-17-6/+22
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| * | imx: mx6 remove duplicated enable_cspi_clockPeng Fan2015-07-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_spi_clock does the same thing with enable_cspi_clock, so remove enable_cspi_clock. Remove enable_cspi_clock prototype in header file convert cm_fx6/spl.c to use enable_spi_clk Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-07-31-71/+367
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| * | | powerpc/T104xRDB: Remove vbank check redundant codePriyanka Jain2015-07-31-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sw variable in checkboard function is storing vbank value which can only take 3-bit value. So check of sw value for if greater than 7 is redundant. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t1023rdb: eMMC boot without external SD cardShengzhou Liu2015-07-31-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC has no CD and WP pins, it needs to add board-specific board_mmc_getcd() and board_mmc_getwp() in SPL to support eMMC boot without external SD card inserted. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t1023rdb: add support for T1023RDB RevCShengzhou Liu2015-07-31-46/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for NOR flash and GPIO/I2C switch control on RevC. - NOR support - bank0/bank4 switch - SD/eMMC switch - board version Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040Aneesh Bansal2015-07-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P5020 and P5040. The Secure boot target has already been added for P3041 by enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM. The targets for P5020 and P5040 are added in the same manner. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal2015-07-31-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for NAND for P3041. For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t104x, t102x: Update CPC debug register value in PBI commandsPriyanka Jain2015-07-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PBI command in pbi_cfg files to keep register bit to default reset value while configuring CPC as SRAM Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/t4rdb: fix cpld reset altbankShaohui Xie2015-07-28-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpld reset altbank should always reset to bank4 no matter what current bank is. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/p2020rdb: fix the FDT_ERR_NOTFOUND issueYing Zhang2015-07-28-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the function ft_board_setup() delete the USB2 device node, it leads to can't find the device node and hung up. In fact only P1020RDB needs to delete the USB2 node, this patch fixes this issue. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/T104xD4: Add Secure boot support for T104xD4RDB platformsgaurav rana2015-07-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defconfig files are added and SFP version for these platforms is updated. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | powerpc/T104xD4RDB: Add T104xD4RDB boards supportPriyanka Jain2015-07-28-6/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 - Support of DIU Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-07-29-4/+447
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| * | | | T210: Add support for 64-bit T210-based P2571 boardTom Warren2015-07-28-0/+443
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with a 32-bit AVP loader). Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: nyan-big: Allow TPM on I2CSimon Glass2015-07-27-4/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the I2C3 pins so that the TPM can be used. Note: There is an DP change also, caused by running board-to-uboot.py script in the latest tegra-pinmux-script tree. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-18/+41
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| * | | | zynq: Fix typo in Makefile about custom ps7_init fileMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial fix. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Show EL level where U-Boot runsMichal Simek2015-07-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add one more print to make clear which EL level U-Boot runs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynqmp: Wire up SATA for the boardMichal Simek2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SATA for the ZynqMP targets. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynqmp: Wire up ethernet controllersMichal Simek2015-07-28-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire up ethernet controllers and enable MII and BOOTP options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Kconfig: Move zynqmp KconfigSiva Durga Prasad Paladugu2015-07-28-15/+0
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the zynqmp Kconfig from board to arch as there may be different boards under same architecture. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDRNishanth Menon2015-07-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do just like what the rest of the world does. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-By: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* | | | stm32f429: pass the device unique ID in DTBAntonio Borneo2015-07-27-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read device unique ID and set environment variable "serial#". Value would then be passed to kernel through DTB. To read ID from DTB, kernel is required to have commit: 3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1: arch: Show the serial number from devicetree in cpuinfo) This commit is already mainline since v4.1-rc1. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* | | | Kill unneeded #include <linux/kconfig.h>Masahiro Yamada2015-07-27-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the top-level Makefile forces all the source files to include include/linux/kconfig.h (see the UBOOTINCLUDE define), these includes are redundant. By the way, there are exceptions for the statement above; host programs. In fact, host tools in U-Boot depend on a particular board configuration, although I think they should not. So, some files still include <linux/config.h> to work around build errors on host tools. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | | board: ks2: README: fix typosNishanth Menon2015-07-27-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix up a few typos in documentation. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Murali Karicheri <m-karicheri2@ti.com>
* | | | omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski2015-07-27-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-07-25-38/+19
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| * | | sunxi: musb: Move musb config and platdata to the sunxi-musb glueHans de Goede2015-07-25-26/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the musb config and platdata to the sunxi-musb glue, which is where it really belongs. This is preparation patch for adding device-model support for the sunxi-musb-host code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb-phy: Add support for reading otg id pin valueHans de Goede2015-07-25-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for reading the id pin value of the otg connector to the usb phy code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: spl: Remove redundant check from `board_mmc_init` for signatureDaniel Kochmański2015-07-24-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the boot signature check from board_mmc_init() in spl mode, as it is already done in spl_boot_device() in this case, and update the comments to reflect this. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Disable the check only for SPL instead of always] Acked-by: Hans De Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Create helper function veryfing valid boot signature on MMCDaniel Kochmański2015-07-24-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | Merge git://git.denx.de/u-boot-usbTom Rini2015-07-24-3/+43
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| * | | implement Fastboot via USB OTG on bcm28155_ap boardsJiandong Zheng2015-07-22-0/+40
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
| * | | usb: USB download gadget and functions config options coherent namingPaul Kocialkowski2015-07-22-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces a coherent scheme for naming USB download gadget and functions config options. The download USB gadget config option is moved to CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each function's config option is moved to a CONFIG_USB_FUNCTION_ prefix. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
* | | | arm: mvebu: db-88f6820: Add SPL support with DDR init codeStefan Roese2015-07-23-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL support for the Marvell DB-88F6820-GP board. With this change, the bin_hdr from the original Marvell U-boot is not needed any more on this board. The sources from bin_hdr (SERDES/PHY and DDR setup) are now integrated in mainline U-Boot. And this patch enables them for this board. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | arm: mvebu: serdes: Move Armada XP SERDES / PHY init code into new directoryStefan Roese2015-07-23-2/+2
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | With the upcoming addition of the Armada 38x SPL support, which is not compatible to the Armada XP SERDES init code, we need to introduce a new directory infrastructure. So lets move the AXP serdes init code into a new directory. This way the A38x code can be added in a clean way. Signed-off-by: Stefan Roese <sr@denx.de>
* | | armv8/ls2085ardb: DSPI pin muxing configure through QIXIS CPLDHaikun.Wang@freescale.com2015-07-20-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS CPLD to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085aqds: DSPI pin muxing configure through QIXISHaikun Wang2015-07-20-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | arm/ls102xa: Add little-endian mode support for audio IPsAlison Wang2015-07-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | As SCFG_ENDIANCR register is added to choose little-endian or big-endian for audio IPs on Rev2.0 silion, little-endian mode is selected. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | board/ls2085rdb: Export functions for standalone AQ FW load appsPrabhakar Kushwaha2015-07-20-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Export functions required by Aquntia PHY firmware load application. functions are memset, strcpy, mdelay, mdio_get_current_dev, phy_find_by_mask, mdio_phydev_for_ethname and miiphy_set_current_dev Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvrPrabhakar Kushwaha2015-07-20-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The agreed split of the top of memory is 256M for debug server and 256M for MC. This patch implements the split. In addition, the MC mem must be 512MB aligned, so the amount of memory to hide must be 512MB to achieve that alignment. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085a: Expose all DDR region(s) to LinuxBhupesh Sharma2015-07-20-18/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows u-boot to expose the complete DDR region(s) to Linux (after subtracting the memory hidden via MEM_TOP_HIDE mechanism). This allows the u-boot to support the 48-bit VA support provided by ARM64 Linux in flavors 3.18 and above, by passing the appropriate 'memory' DTS nodes. Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085ardb: Fix SPD address error on early boardsYork Sun2015-07-20-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Board rev C and earlier has duplicated SPD address on 2nd DDR controller slots. It is fixed on rev D and later. SPD addresses need to be updated accordingly. Signed-off-by: York Sun <yorksun at freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
* | | armv8/ls2085a: Avoid hard-coding for board name printPrabhakar Kushwaha2015-07-20-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2085A supports 6 personalities i.e. LS2045AE, LS2045A, LS2080AE, LS2080A, LS2085AE and LS2085A personlities. Instead of hard-coding, board name should change as per selected personality. Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085RDB: Update board version print logicPrabhakar Kushwaha2015-07-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per updated board document, no need to substract 1 from arch[BRD] bit field. Default value + 'A' represents the board revision. So update board version print logic to reflect the same. Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | board/fsl/common: Fix eeprom system version endiannessJaiprakash Singh2015-07-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SYSTEM ID EPPROM always store SYSTEM version info in big endian format. SoC with ARM or PowerPC core should read/write version info from eeprom in BIG endian format. So use cpu-specific APIs to read SYSTEM version. Signed-off-by: Jaiprakash Singh <b44839 at freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085qds: Update SFP TX bit as "0" to enable XFIPrabhakar Kushwaha2015-07-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | FPGA BRDCFG9[SFP_TX] should be clear in order to enable XFI ports. Signed-off-by: Dai Haruki <Dai.Haruki at freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | armv8/ls2085aqds: Add support of SerDes protocol 0x49Prabhakar Kushwaha2015-07-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes Protocol 0x49 enables 4 SGMII, PEX4, SATA1 and SATA2. Add support of 0x49 SerDes protocol to enable 4SGMII on slot4 of ls2085aqds platform. Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-15 01:47:06 +0000