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* Convert CONSOLE_PRE_CONSOLE_BUFFER options to KconfigSimon Glass2016-10-23-0/+3
| | | | | | | Move these option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: Provide common PSCI based reset handlerAlexander Graf2016-10-19-5/+0
| | | | | | | | | | | | | | | | Most armv8 systems have PSCI support enabled in EL3, either through ARM Trusted Firmware or other firmware. On these systems, we do not need to implement system reset manually, but can instead rely on higher level firmware to deal with it. The exclude list seems excessive right now, but NXP is working on providing an in-tree PSCI implementation, so that all NXP systems can eventually use PSCI as well. Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: fix meson] Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: Disable HVC PSCI calls by defaultAlexander Graf2016-10-18-1/+1
| | | | | | | | | | | | | All systems that are running on armv8 are running bare metal with firmware that implements PSCI running in EL3. That means we don't really need to expose the hypercall variants of them. This patch leaves the code in, but makes the code explicit enough to have the compiler optimize it out. With this we don't need to worry about hvc vs smc calling convention when calling psci helper functions. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-10-15-10/+221
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| * pbl: use "wait" command instead of "flush" commandZhao Qiang2016-10-14-8/+4
| | | | | | | | | | | | | | | | | | | | PBL flush command is restricted to CCSR memory space. So use WAIT PBI command to provide enough time for data to get flush in target memory. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [York Sun: rewrap commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.Zhao Qiang2016-10-14-2/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | T series boards use unified RCW for sd, spi and nand boot. Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg and txxx_nand_rcw.cfg for SPI/NAND/SD boot. And modify RCW[PBI_SRC] for them: PBI_SRC=5 for SPI 24-bit addressing PBI_SRC=6 for SD boot PBI_SRC=14 for IFC NAND boot Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-fdtTom Rini2016-10-13-1/+1
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| * cmd/fdt: add possibilty to have 'extrasize' on fdt resizeHannes Schmelzer2016-10-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes devicetree nodes and or properties are added out of the u-boot console, maybe through some script or manual interaction. The devicetree as loaded or embedded is quite small, so the devicetree has to be resized to take up those new nodes/properties. In original the devicetree was only extended by effective 4 * add_mem_rsv. With this commit we can add an argument to the "fdt resize" command, which takes the extrasize to be added. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Simon Glass <sjg@chromium.org>
* | board: am335x: Always set eth/eth1addr environment variableRoger Quadros2016-10-13-26/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | Ethernet ports might be used in the kernel even if CPSW driver is disabled at u-boot. So always set ethaddr and eth1addr environment variable from efuse. Retain usbnet_devaddr as it is required for SPL USB eth boot. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | board: am335x-icev2: add ethernet phy mode detection logicRoger Quadros2016-10-13-7/+75
|/ | | | | | | | | | | | | | | | | | | Both ethernet ports can be used as CPSW ethernet (RMII mode) or PRU ethernet (MII mode) by setting the jumper near the port. Read the jumper value and set the pinmux, external mux and PHY clock accordingly. As jumper line is overridden by PHY RX_DV pin immediately after bootstrap (power-up/reset), we have to use GPIO edge detection to capture the jumper line status. As u-boot doesn't provide any infrastructure for GPIO edge detection, we directly access the GPIO registers. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-10-12-0/+23
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| * x86: conga-qeval20-qa3: Add README to explain the console UART optionsStefan Roese2016-10-11-0/+23
| | | | | | | | | | | | | | | | | | This patch adds a small README to explain the 2 defconfig files and its usage for the different console UART options. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-10-12-0/+514
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| * | arm: kirkwood: fix Synology board tagWalter Schweizer2016-10-09-0/+7
| | | | | | | | | | | | | | | Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: kirkwood: fix output enable settingsWalter Schweizer2016-10-09-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: kirkwood: fix kirkwood initial setupWalter Schweizer2016-10-09-11/+16
| | | | | | | | | | | | | | | Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: kirkwood: ds109 board is maintainedWalter Schweizer2016-10-09-0/+6
| | | | | | | | | | | | | | | Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: kirkwood: add support for Synology DS109 boardWalter Schweizer2016-10-09-0/+496
| |/ | | | | | | | | | | | | | | | | Synology DS109 is based on MV88F6281. The code is based on Dreamplug code with modificatons from Synologys open source repository. Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-10-12-38/+26
|\ \ | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
| * | armv7: LS1021a: enable i-cache in start.SXiaoliang Yang2016-10-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | fsl_sec_mon: Update driver for Security MonitorSumit Garg2016-10-06-38/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the API's for transition of Security Monitor states. Instead of providing both initial and final states for transition, just provide final state for transition as Security Monitor driver will take care of it internally. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [York Sun: Reformatted commit message slightly] Reviewed-by: York Sun <york.sun@nxp.com>
* | | common: Add DISPLAY_BOARDINFOLokesh Vutla2016-10-12-56/+0
| |/ |/| | | | | | | | | | | | | Create a Kconfig entry for DISPLAY_BOARDINFO and make it be the default in certain architectures. Migrate all config files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-10-08-259/+680
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| * | colibri_imx7: use Ricoh RN5T567 to reboot the boardStefan Agner2016-10-07-0/+42
| | | | | | | | | | | | | | | | | | Use the external PMIC Ricoh RN5T567 to reliably restart the system. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | colibri_imx7: remove legancy UART platform dataStefan Agner2016-10-07-10/+0
| | | | | | | | | | | | | | | | | | | | | We now use device tree to provide SoC data to the UART driver, there is no need for the legancy UART platform data. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | colibri_imx7: remove legancy I2C supportStefan Agner2016-10-07-40/+0
| | | | | | | | | | | | | | | | | | | | | Remove legancy I2C config and code in favor of upcomming DM/DT enable I2C support. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | udoo: Add a README fileFabio Estevam2016-10-06-0/+21
| | | | | | | | | | | | | | | | | | | | | Add a README file to explain how to build and flash the SD card for Udoo boards. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | pcm052: add new BK4r1 target based on PCM052 SoMAlbert ARIBAUD \(3ADEV\)2016-10-06-52/+136
| | | | | | | | | | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: allow specifying onboard DDR size in configsAlbert ARIBAUD \(3ADEV\)2016-10-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCM052 SoMs may be equipped with various sizes of DDR. Keep default of 256MB; new PCM052-based targets will specify their actual DDR size. Linux command line is auto-adjusted to DDR size. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: add 'm4go' commandAlbert ARIBAUD \(3ADEV\)2016-10-06-0/+38
| | | | | | | | | | | | | | | | | | | | | Add the 'm4go' command to pcm052-based targets. It loads scatter file images. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | arm: imx: add i.MX6ULL 14x14 EVK board supportPeng Fan2016-10-04-0/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX6ULL EVK board support: Add device tree file, which is copied from NXP Linux. Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR. The uart iomux settings are still keeped in board file. Boot Log: U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800) CPU: Freescale i.MX6ULL rev1.0 at 396MHz CPU: Commercial temperature grade (0C to 95C) at 15C Reset cause: POR Model: Freescale i.MX6 ULL 14x14 EVK Board Board: MX6ULL 14x14 EVK DRAM: 512 MiB MMC: initialized IMX pinctrl driver FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 => mmc dev 1 switch to partitions #0, OK mmc1 is current device Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | mx6sabresd: Make SPL DDR configuration to match the DCD tableFabio Estevam2016-10-04-154/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using SPL on i.mx6 we frequently notice some DDR initialization mismatches between the SPL code and the non-SPL code. This causes stability issues like the ones reported at 7dbda25ecd6d7c ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also: http://lists.denx.de/pipermail/u-boot/2016-September/266355.html . As the non-SPL code have been tested for long time and proves to be reliable, let's configure the DDR in the exact same way as the non-SPL case. The idea is simple: just use the DCD table and write directly to the DDR registers. Retrieved the DCD tables from: board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg and board/freescale/mx6sabresd/mx6qp.cfg (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga) This method makes it easier for people converting from non-SPL to SPL code. Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | wandboard: Fix hang when going into low frequencyFabio Estevam2016-10-04-3/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | A kernel hang is observed when running wandboard 3.14 kernel and going to the lowest operational point of cpufreq: # ifconfig eth0 down # echo 1 > /sys/class/graphics/fb0/blank The problem is caused by incorrect setting of the REFR field of register MDREF. Setting it to 4 refresh commands per refresh cycle fixes the hang. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | board: ti: dra7xx: complex definitions should be protected with parenthesesMugunthan V N2016-10-08-4/+4
| | | | | | | | | | | | | | | | | | As a standard practice complex definitions should be protected with parentheses, as it might fail when used in a complex if statements. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: dts: dra72: add rev C evm supportMugunthan V N2016-10-08-5/+11
| | | | | | | | | | | | | | | | | | | | | | Add DTS support for dra72 evm Rev C which has the following changes * Two ethernet ports now instead of the single one in rev B. * DP83867 ethernet phy instead of DP838865. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | vexpress: disable cci ace slave ports when booting in non-sec/hyp modeSudeep Holla2016-10-07-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting to nonsec booting") added support to check if the firmware on TC2 is configured appropriately before booting in nonsec/hyp mode. However when booting in non-secure/hyp mode, CCI control must be done in secure firmware and can't be done in non-secure/hyp mode. In order to ensure that, this patch disables the cci slave port inteface so that it is not accessed at all. Cc: Jon Medhurst <tixy@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Jon Medhurst <tixy@linaro.org> Tested-by: Jon Medhurst <tixy@linaro.org>
* | Various, accumulated typos collected from around the tree.Robert P. J. Day2016-10-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | spi: Move freescale-specific code into a private headerSimon Glass2016-10-06-20/+39
|/ | | | | | | | | | | | | | At present there are two SPI functions only used by freescale which are defined in the spi_flash.h header. One function name matches an existing generic SPL function. Move these into a private header to avoid confusion. Arcturus looks like it does not actually support SPI, so drop the SPI code from that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-10-03-152/+8
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| * rockchip: add boot-mode support for rk3288, rk3036Jacob Chen2016-10-01-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: move common function from board-file to rk3036-board.cJacob Chen2016-10-01-132/+0
| | | | | | | | | | | | | | To keep it same with 3288 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: miniarm: remove eMMC supportXu Ziyuan2016-10-01-8/+0
| | | | | | | | | | | | | | The latest rk3288-miniarm board doesn't have eMMC device, so remove it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: evb_rk3399: init vdd_center regulatorKever Yang2016-10-01-0/+6
| | | | | | | | | | | | | | | | Add vdd_center pwm regulator get_device to enable this regulator. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | board: am33xx-hs: Allow post-processing of FIT image on AM33xxAndrew F. Davis2016-10-02-0/+8
| | | | | | | | | | | | | | | | | | | | | | When CONFIG_FIT_IMAGE_POST_PROCESS or CONFIG_SPL_FIT_IMAGE_POST_PROCESS is enabled board_fit_image_post_process will be called, add this function to am33xx boards when CONFIG_TI_SECURE_DEVICE is set to verify the loaded image. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ks2: Enable ECC using detected DDR sizeLokesh Vutla2016-10-01-0/+3
|/ | | | | | | | | EEC is being enabled based on the ddr size populated by SPD data. But not all keystone platforms have SPD data to detect ddr3 size. So, enable ECC using the detected DDR size. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-09-30-33/+33
|\ | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/dra7xx_evm.h
| * usb: fsl: Rename fdt_fixup_dr_usbSriram Dash2016-09-27-33/+33
| | | | | | | | | | | | | | | | The function fdt_fixup_dr_usb is specific to fsl/nxp. So, make the function name explicit and rename fdt_fixup_dr_usb into fsl_fdt_fixup_dr_usb. Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-09-27-1/+7
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| * | ARM: tegra: fix ULPI PHY on Ventana and SeaboardStephen Warren2016-09-27-1/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ce02a71c2374 "tegra: dts: Sync tegra20 device tree files with Linux" enabled the ULPI USB port on Ventana, but made no attempt to ensure that U-Boot code could handle this. In practice, various code is missing, and various configuration options are not enabled, which causes U-Boot to hang when attempting to initialize this USB port. This patch enables ULPI PHY support on Ventana, and adds the required pinmux setup for the port to operate. Note that Ventana is so similar to Seaboard that this change is made in the Seaboard board file, which is shared with Ventana. Seaboard also has the ULPI USB port wired up in hardware, although to an internal port that often doesn't have anything attached to it. However, the DT nodes for the USB controller and PHY had different status property values, so the port was not initialized by U-Boot. Fix this inconsistency, and enable the ULPI port, just like in the Linux kernel DT. This likewise requires enabling ULPI support in the Seaboard defconfig. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | arm64: mvebu: Add Armada 7K db-88f7040 development board supportStefan Roese2016-09-27-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell Armada 7K DB-88F7040 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - USB - SATA / AHCI Support for other interfaces will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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