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* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-03-26-1/+1
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| * ppc4xx: Sequoia: Fix TLB reassignment in NAND booting codeStefan Roese2009-03-26-1/+1
| | | | | | | | | | | | | | | | | | | | This patch fixes a bug in the Sequoia TLB init code to reconfigure the correct TLB (boot space) after running from RAM. This bug was introduced with patch 4d332dbeb08f5863d1ea69d91a00c5499d3a87ed [ppc4xx: Make Sequoia boot vxWorks] which changed the order of the TLB in the Sequoia init.S file. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-03-26-1039/+80
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| * at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre2009-03-22-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * cmc_pu2: fix implicit declaration of function 'eth_setenv_enetaddr'Jean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * cmc_pu2: fix misc_init_r prototypeJean-Christophe PLAGNIOL-VILLARD2009-03-22-3/+5
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move nand drivers to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-22-479/+11
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * atmel/at91/boards: compile dataflash partition only when dataflash isJean-Christophe PLAGNIOL-VILLARD2009-03-22-5/+5
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common macb initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-96/+5
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common usb host initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-10/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common led management to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-188/+28
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common spi initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-90/+7
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move common serial initialisation to cpuJean-Christophe PLAGNIOL-VILLARD2009-03-22-168/+12
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-03-25-344/+598
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| * | Blackfin: bf537-stamp: split post code out into dedicated post.cMike Frysinger2009-03-24-237/+245
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add support for S25FL128 partsMike Frysinger2009-03-24-38/+47
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: overhaul SPI flash handling to speed things upMike Frysinger2009-03-24-6/+126
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add support for SST SPI flashesMike Frysinger2009-03-24-29/+78
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add hack for crappy m25p80Mike Frysinger2009-03-24-0/+7
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf537-stamp: rewrite MAC-in-flash handlingMike Frysinger2009-03-24-23/+56
| | | | | | | | | | | | | | | | | | | | | Use the common net eth functions to setup the env/global data with the MAC address, and properly handle the case where CONFIG_SYS_NO_FLASH is defined. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf533-stamp: rewrite startup LED notificationsMike Frysinger2009-03-24-14/+48
| | | | | | | | | | | | | | | | | | | | | Again, don't clobber pins that we aren't actually using, and use the common LED framework rather than our own hob-job-but-not-really-working. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: kill off LDR jump blockMike Frysinger2009-03-23-12/+8
| | | | | | | | | | | | | | | | | | | | | The Boot ROM uses EVT1 as the entry point so set that rather than having to use a tiny jump block in the default EVT1 location. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf537-stamp: move CONFIG_POST handling to COBJS-$(...)Mike Frysinger2009-03-23-4/+2
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Add multi-chip NAND support for the TQM8548 modulesWolfgang Grandegger2009-03-23-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patches configures the NAND UPM-FSL driver with multi-chip support for the Micron MT29F8G08FAB NAND flash memory on the TQM8548 modules. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Add wait flags to support board/chip specific delaysWolfgang Grandegger2009-03-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND flash on the TQM8548_BE modules requires a short delay after running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE requires a further short delay after writing out a buffer. Normally the R/B pin should be checked, but it's not connected on the TQM8548_BE. The corresponding Linux FSL UPM driver uses similar delay points at the same locations. To manage these extra delays in a more general way, I introduced the "wait_flags" field allowing the board-specific driver to specify various types of extra delay. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Add multi chip support to the FSL-UPM driverWolfgang Grandegger2009-03-23-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | This patch adds support for multi-chip NAND devices to the FSL-UPM driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now called with the argument "chip_nr" to allow testing the proper chip select line. The NAND support of the MPC8360ERDK is updated as well. No other boards are currently using the FSL UPM driver. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'mimc200'Haavard Skinnemoen2009-03-23-115/+87
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| * Setup extra MIMC200 chip selectsMark Jackson2009-02-23-0/+14
| | | | | | | | | | | | | | | | | | | | | | Added code to setup the extra Flash and FRAM chip selects as used on the MIMC200 board. V2 moves the init code from the common "cpu.c" file into the board specific setup file. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * MIMC200: tidy GCLK init codeMark Jackson2009-02-23-6/+8
| | | | | | | | | | | | | | | | | | | | | | Change the MIMC200 startup code to use the built-in (rather than hard-coded) funtions for setting up gclk outputs. We'll also move the code to the new, more-appropriate board_postclk_init() routine. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * Merge branch 'evk1100-prep' into nextHaavard Skinnemoen2009-02-23-2/+2
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| | * AVR32: Make cacheflush cpu-dependentOlav Morken2009-02-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | Merge branch 'mimc200' into nextHaavard Skinnemoen2009-02-23-1/+1
| |\ \ | | |/ | |/| | | | | | | | | | | | | Conflicts: board/mimc/mimc200/mimc200.c include/configs/mimc200.h
| | * MIMC200 board now uses CONFIG_DISABLE_CONSOLEMark Jackson2008-10-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Changed MIMC200 board setup and config to use CONFIG_DISABLE_CONSOLE. Also fixed default uImage location. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | Merge branch 'cleanups' into nextHaavard Skinnemoen2009-02-23-108/+64
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| | * \ Merge branch 'fixes' into cleanupsHaavard Skinnemoen2008-12-17-21851/+18932
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
| | * | | atstk1000: Convert to new-style makefileHaavard Skinnemoen2008-09-01-4/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | | avr32: use board_early_init_r instead of board_init_infoHaavard Skinnemoen2008-09-01-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific board_init_info hook by the standard board_early_init_r hook and make it optional. board_early_init_r() runs somewhat earlier than board_init_info used to do, but this isn't a problem for any of the in-tree boards. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | | avr32: Use board_postclk_init instead of gclk_initHaavard Skinnemoen2008-09-01-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific gclk_init() board hook with the standard board_postclk_init() hook which is supposed to run at the same point during initialization. Provide a dummy weak alias for boards not implementing this hook. The cost of this is: - 2 bytes for the dummy function (retal 0) - 2 bytes for each unnecessary function call (short rcall) which is a pretty small price to pay for avoiding lots of #ifdef clutter. In this particular case, all boards probably end up slightly smaller because we avoid the conditional checking if the gclk_init symbol is NULL. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | | hammerhead: Use gclk helper functionsHaavard Skinnemoen2008-09-01-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new gclk helper functions to set up the PHY clock instead of accessing the PM registers directly. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| | * | | avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-91/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* | | | | Separate mtdparts command from jffs2Stefan Roese2009-03-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mtdparts commands are included in the jffs2 command support. This doesn't make sense anymore since other commands (e.g. UBI) use this infrastructure as well now. This patch separates the mtdparts commands from the jffs2 commands making it possible to only select mtdparts when no JFFS2 support is needed. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | | | | Add support for the digsy MTC board.Grzegorz Bernacki2009-03-20-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the InterControl custom device based on the MPC5200B chip. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | | | ppc4xx: Use correct io accessors for esd 405/440 boardsMatthias Fuchs2009-03-20-165/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | ppc4xx: Use correct io accessors for esd 405 boardsMatthias Fuchs2009-03-20-107/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | ppc4xx: Cleanup linker scripts of esd 4xx boardsMatthias Fuchs2009-03-20-310/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | ppc4xx: Update TEXT_BASE for DASA_SIM boardsMatthias Fuchs2009-03-20-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix building DASA_SIM boards by increasing U-Boot's size in flash. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | ppc4xx: DU405 maintenance fixMatthias Fuchs2009-03-20-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -strip unused features -fix resetting phy Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Move ali512x.hGraeme Russ2009-03-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved ali512x.h from include/asm-i386/ic/ to /include Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
* | | | | Rename SC520 Configuration OptionsGraeme Russ2009-03-20-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Options are now all uniformly CONFIG_SYS_SC520_<option> Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
* | | | | Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-702/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
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