| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
| |
..in board pci.c files
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
| |
need to rm it from pci code, too!
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
| |
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
| |
This adds libfdt support code for the Wind River sbc8349 board.
Parallel of commit 3fde9e8b22cfbd7af489214758f9839a206576cb for
the other Freescale 83xx boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
|
|
|
|
|
|
|
| |
ECC code is now shared for all 83xx boards, so remove board specific one.
See commit daab8c67d2defef73dc26ab07f0c3afd1b05d019 for reference.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
|
|
|
|
|
|
|
|
| |
mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
| |
rename to fdt_path_offset
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
| |
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
|
|
|
|
|
| |
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| | |
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| |
| |
| |
| |
| |
| | |
These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| |
| |
| |
| |
| |
| |
| | |
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| |
| |
| |
| |
| |
| | |
These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
|
|/
|
|
| |
Signed-off-by: Larry Johnson <lrj@acm.org>
|
|
|
|
|
|
|
|
| |
Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
|
|
|
|
|
|
|
|
|
| |
Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:
$ /usr/bin/test a == a && echo OK
/usr/bin/test: ==: binary operator expected
This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| |
| |
| |
| | |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| |
| |
| |
| | |
This patch adds some BSP commands and FPGA booting support
for esd's PMC440 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| |
| |
| |
| | |
This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| | |
- add EEPROM write protection for esd PLU405 boards.
- initialize NAND GPIOs
- use correct io accessors
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| |
| |
| |
| | |
This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
- add EEPROM write protection
- initialize NAND GPIOs
- use correct io accessors
- slow down I2C clock to 100kHz
- enable ext. I2C bus
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |\ |
|
| | |\ |
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| | |\ \
| | | |/ |
|
| | | |\
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Conflicts:
MAINTAINERS
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| | | | |\
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Conflicts:
drivers/Makefile
|
| | | | |\ \
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Conflicts:
drivers/Makefile
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
| | | | |\ \ \
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
Conflicts:
CREDITS
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
This adds support for the Hitachi MS7750SE.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE targets.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|