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* Setup extra MIMC200 chip selectsMark Jackson2009-02-23-0/+14
| | | | | | | | | | | Added code to setup the extra Flash and FRAM chip selects as used on the MIMC200 board. V2 moves the init code from the common "cpu.c" file into the board specific setup file. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* MIMC200: tidy GCLK init codeMark Jackson2009-02-23-6/+8
| | | | | | | | | | | Change the MIMC200 startup code to use the built-in (rather than hard-coded) funtions for setting up gclk outputs. We'll also move the code to the new, more-appropriate board_postclk_init() routine. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'evk1100-prep' into nextHaavard Skinnemoen2009-02-23-2/+2
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| * AVR32: Make cacheflush cpu-dependentOlav Morken2009-02-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'mimc200' into nextHaavard Skinnemoen2009-02-23-1/+1
|\ \ | |/ |/| | | | | | | | | Conflicts: board/mimc/mimc200/mimc200.c include/configs/mimc200.h
| * MIMC200 board now uses CONFIG_DISABLE_CONSOLEMark Jackson2008-10-05-1/+1
| | | | | | | | | | | | | | | | Changed MIMC200 board setup and config to use CONFIG_DISABLE_CONSOLE. Also fixed default uImage location. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'cleanups' into nextHaavard Skinnemoen2009-02-23-108/+64
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| * \ Merge branch 'fixes' into cleanupsHaavard Skinnemoen2008-12-17-21851/+18932
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
| * | | atstk1000: Convert to new-style makefileHaavard Skinnemoen2008-09-01-4/+5
| | | | | | | | | | | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: use board_early_init_r instead of board_init_infoHaavard Skinnemoen2008-09-01-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific board_init_info hook by the standard board_early_init_r hook and make it optional. board_early_init_r() runs somewhat earlier than board_init_info used to do, but this isn't a problem for any of the in-tree boards. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Use board_postclk_init instead of gclk_initHaavard Skinnemoen2008-09-01-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific gclk_init() board hook with the standard board_postclk_init() hook which is supposed to run at the same point during initialization. Provide a dummy weak alias for boards not implementing this hook. The cost of this is: - 2 bytes for the dummy function (retal 0) - 2 bytes for each unnecessary function call (short rcall) which is a pretty small price to pay for avoiding lots of #ifdef clutter. In this particular case, all boards probably end up slightly smaller because we avoid the conditional checking if the gclk_init symbol is NULL. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | hammerhead: Use gclk helper functionsHaavard Skinnemoen2008-09-01-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new gclk helper functions to set up the PHY clock instead of accessing the PM registers directly. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-91/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* | | | OMAP3: Pandora: Update pin muxDirk Behme2009-02-22-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock pin must have input enabled for MMC3 to work. Also enable pull-ups for cmd/data lines to be consistent with remaining MMC host pin setup. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
* | | | OMAP3: Add OMAP3 auto detectionDirk Behme2009-02-22-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds OMAP3 cpu type auto detection based on OMAP3 register and removes hardcoded values. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* | | | OMAP3: Beagle: Add board revision detectionDirk Behme2009-02-22-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX) which might need different software handling. For this, GPIO pin 171 (GPIO module 6, offset 11) can be used to check for board revision. If this pin is low, we have a rev C board. Else it must be a revision Ax or Bx board. To handle board differences you can call function beagle_get_revision(). E.g.: if (beagle_get_revision()) { /* do special revision C stuff here */ } Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* | | | OMAP3: Overo: Clean up pin mux and GPIO configurationDirk Behme2009-02-22-21/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Make Overo GPIO114 an input for touchscreen PENDOWN * Make Overo GPIO144-147 readable * Make Overo EHCI pinmux match beagle rev c setup * Adjust pinmux for SMSC911X network chip support * Remove unnecessary GPIO setup * Fix merge error in Makefile Signed-off-by: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* | | | davinci: fix implicit declaration of function 'davinci_errata_workarounds'Jean-Christophe PLAGNIOL-VILLARD2009-02-22-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | ARM DaVinci: Add common peripherals and modules enable functions.Hugo Villeneuve2009-02-22-105/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Taken all the duplicated code for enabling common modules and apply software workarounds from the board specific code into common functions. Also added comments explaining the workarounds (from TI errata documents) and replaced some numerical bit numbers with more meaningful defines. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
* | | | Enable Ethernet for Nomadik 8815 Evaluation KitAlessandro Rubini2009-02-22-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This trivially enables Ethernet support in the debug board by setting up the proper chip select. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
* | | | Coding Style cleanup; update CHANGELOGWolfgang Denk2009-02-22-3/+0
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | 82xx, mgcoge: updates for 2009.03Heiko Schocher2009-02-19-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - activate CS4 for accessing the FPGA - activate Rx buf len > 1 on SMC - pram activated - MTDPARTS_DEFAULT defined - update the size of the flashes in the DTS before booting Linux - MONITOR_LEN updated to 384k - added CONFIG_HOSTNAME - added CONFIG_ENV_BUFFER_PRINT - Environment size reduced to 16k Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | 8xx, mgsuvd: updates for 2009.03Heiko Schocher2009-02-19-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - activate Rx buf len > 1 on SMC - pram activated - MTDPARTS_DEFAULT defined - update the size of the flash in the DTS before booting Linux - MONITOR_LEN updated to 384k - added CONFIG_HOSTNAME - added CONFIG_ENV_BUFFER_PRINT - Environment size reduced to 16k Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | TQM8xxL: make some room in low memory for future needsWolfgang Denk2009-02-19-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | THe TQM8xxL use a ahnd-optimized linker script to efficiently use the small boot sectors in the flash. This patch makes some room in the first sector to prepare for a size increase of lib_generic/vsprintf.o by a future patch. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-02-19-87/+40
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| * | | | ppc4xx: Some more PMC405 coding-style cleanupStefan Roese2009-02-18-15/+15
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Update PMC405 board supportMatthias Fuchs2009-02-18-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares the good old PMC405 board support for upcoming PMC405V2 patches. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Cleanup PMC405 board supportMatthias Fuchs2009-02-18-70/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes coding style for PMC405 board support. Also some unneeded features/code is removed. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-02-19-0/+493
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| * | | | | qong: support for Dave/DENX QongEVB-LITE boardIlya Yanok2009-02-10-0/+493
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Dave/DENX QongEVB-LITE i.MX31-based board. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | | | Fix build errors after making flash_get_info() non-staticWolfgang Denk2009-02-18-4/+3
| |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix for these build problems: error: static declaration of 'flash_get_info' follows non-static declaration Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | 83xx: Add eSDHC support on 8379 EMDS boardAndy Fleming2009-02-16-5/+18
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | 85xx: Add eSDHC support for 8536 DSAndy Fleming2009-02-16-0/+14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | TQM85xx: Fix a couple warnings in TQM8548 buildAndy Fleming2009-02-16-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ecm variable in sdram.c was being declared for all 8548, but only used by specific 8548 boards, so we make that variable require those specific boards, too The nand code was using an index "i" into a table, and then re-using "i" to set addresses for each upm. However, then it relied on the old value of i still being there to enable things. Changed the second "i" to "j" Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | MPC85xx: TQM8548: workaround for erratum DDR 19 and 20Wolfgang Grandegger2009-02-16-8/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the workaround for erratum DDR20 according to MPC8548 Device Errata document, Rev. 1: "CKE signal may not function correctly after assertion of HRESET". Furthermore, the bug DDR19 is fixed in processor version 2.1 and the work-around must be removed. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM8548: use cache for AG and BE variantsWolfgang Grandegger2009-02-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes accesses to the system memory cachable by removing the caching-inhibited and guarded flags from the relevant TLB entries for the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards are configured similarly. This results in a big averall performace improvement. TFTP downloads, NAND Flash accesses, kernel boots, etc. are much faster. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM8548_AG: add 1 GiB DDR2-SDRAM configurationWolfgang Grandegger2009-02-16-4/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG module. Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM8548: fix SDRAM timing for 533 MHzWolfgang Grandegger2009-02-16-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to new TQM8548 timing specification: Refresh Recovery: 34 -> 53 clocks CKE pulse width: 1 -> 3 cycles Window for four activities: 13 -> 14 cycles Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM8548: add support for the TQM8548_BE moduleWolfgang Grandegger2009-02-16-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TQM8548_BE is a variant of the TQM8548 module with NAND and CAN interface. With NAND support, the image is significantly larger and TEXT_BASE is adjusted accordingly. U-Boot can be built for this module with "$ make TQM8548_BE_config". Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM85xx: make standard PCI/PCI-X configurableWolfgang Grandegger2009-02-16-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TQM8548_AG module does not have the standard PCI/PCI-X interface connected but just the PCI Express interface . So far it was not possible to disable it without disabling the complete PCI interface (CONFIG_PCI) including PCI Express. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | MPC85xx: TQM85xx: fix flash protection for boot loaderWolfgang Grandegger2009-02-16-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the reset vector is located at 0xfffffffc, all flash sectors from the beginning of the U-Boot binary to 0xffffffff must be protected. On the TQM8548-AG having small sectors at the end of the flash it happened that the last two sector were not protected and an "erase all" left an un-bootable system behind: Bank # 2: CFI conformant FLASH (32 x 16) Size: 32 MB in 270 Sectors AMD Standard command set, Manufacturer ID: 0xEC, Device ID: 0x257E Erase timeout: 8192 ms, write timeout: 1 ms FFFA0000 E RO FFFC0000 RO FFFE0000 RO FFFE4000 RO FFFE8000 RO FFFEC000 RO FFFF0000 RO FFFF4000 RO FFFF8000 E FFFFC000 The same bug seems to be in drivers/mtd/cfi_flash.c:flash_init() and many board BSPs as well. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | | 86xx: Reset updatePeter Tyser2009-02-16-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the 86xx reset sequence to try executing a board-specific reset function. If the board-specific reset is not implemented or does not succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard reset procedure than the previous method and allows all board peripherals to be reset if needed. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | | | | 85xx: print boot header info to distinquish 36-bit addr map on MPC8572 DSKumar Gala2009-02-16-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added some info that is printed out when we boot to distiquish if we built MPC8572DS_config vs MPC8572DS_36BIT_config since they have different address maps. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | | Fixup SGMII PHY ids in the device treeAndy Fleming2009-02-16-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree's PHY addresses need to be fixed up if we're using the SGMII Riser Card. The 8572, 8536, and 8544 DS boards were modified to call this function. Code idea taken from Liu Yu <yu.liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | 85xx: Fix bug in device tree setup in 36-bit physical confgKumar Gala2009-02-16-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the 36-bit physical config for MPC8572DS when need the start address of memory and it size to be kept in phys_*_t instead of a ulong since we support >4G of memory in the config and ulong cant represent that. Otherwise we end up seeing the memory node in the device tree reporting back we have memory starting @ 0 and of size 0. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | | 85xx: Fix address map for 36-bit config of MPC8572DSKumar Gala2009-02-16-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we introduced the 36-bit config of the MPC8572DS board we had the wrong PCI MEM bus address map. Additionally, the change to the address map exposes a small issue in our dummy read on the ULI bus. We need to use the new mapping functions to handle that read properly in the 36-bit config. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | | ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boardsStefan Roese2009-02-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some AMCC eval boards do have a board_eth_init() function calling pci_eth_init(). These boards need to call cpu_eth_init() explicitly now with the new eth_init rework. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Coding style cleanup; update CHANGELOGWolfgang Denk2009-02-12-3/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | mpc8641hpcn: Clean up PCI mapping conceptsBecky Bruce2009-02-10-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up PCI mapping concepts in the 8641 config - rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* | | | | powerpc: Move duplicated BAT defines to mmu.hBecky Bruce2009-02-10-18/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BAT fields are architected; there's no need for these to be in cpu-specific files. Drop the duplication and move these to include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only used by the alaska board, and switch to using the BATU_BL_xxx defines used by all the other boards. The BL_ defines previously in use had to be shifted into the proper position for use, which was inefficient. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
generated by cgit v1.1 at 2024-12-19 20:50:31 +0000