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* ppc4xx: lwmon5: Support for 128 MByte NOR FLASH addedStefan Roese2007-07-24-2/+2
| | | | | | | The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)Stefan Roese2007-07-24-6/+6
| | | | | | | As suggested by Hakan Eryigit, here an updated setup for the lwmon5 interrupt controller. Signed-off-by: Stefan Roese <sr@denx.de>
* POST: Add ECC POST for the lwmon5 boardPavel Kolesnikov2007-07-20-0/+11
| | | | | | | | | This patch adds ECC Post test for the Lwmon5 board based on PPC440EPx to U-Boot. Signed-off-by: Pavel Kolesnikov <concord@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
* Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-07-16-12/+1155
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| * [PCS440EP] - The DIAG LEDs are now blinking, if an error occurHeiko Schocher2007-07-13-3/+15
| | | | | | | | | | | | - fix compile error, if BUILD_DIR is used Signed-off-by: Heiko Schocher <hs@denx.de>
| * Merge with /home/tur/git/u-boot#cm1_qp1Wolfgang Denk2007-07-12-0/+1101
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| | * CM1.QP1: Support for the Schindler CM1.QP1 board.Bartlomiej Sieka2007-07-11-0/+1101
| | | | | | | | | | | | | | | Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | [PCS440EP] - Show on the DIAG LEDs, if the SHA1 check failedHeiko Schocher2007-07-11-9/+39
| | | | | | | | | | | | | | | | | | | | | | | | - now the Flash ST M29W040B is supported (not tested) - fix the "led" command - fix compile error, if BUILD_DIR is used Signed-off-by: Heiko Schocher <hs@denx.de>
* | | ppc4xx: Code cleanupStefan Roese2007-07-16-1/+0
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setupStefan Roese2007-07-16-0/+7
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.cStefan Roese2007-07-16-0/+34
|/ / | | | | | | | | | | | | The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by: Stefan Roese <sr@denx.de>
* | Coding style cleanup; update CHANGELOG.Wolfgang Denk2007-07-10-53/+31
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge with /home/hs/Atronic/u-bootWolfgang Denk2007-07-09-24/+526
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| * [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANGHeiko Schocher2007-06-25-3/+0
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * [PCS440EP] upgrade the PCS440EP board:Heiko Schocher2007-06-22-24/+529
| | | | | | | | | | | | | | | | | | | | | | | | - Show on the Status LEDs, some States of the board. - Get the MAC addresses from the EEProm - use PREBOOT - use the CF on the board. - check the U-Boot image in the Flash with a SHA1 checksum. - use dynamic TLB entries generation for the SDRAM Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-07-06-80/+77
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| * | resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPXNiklaus Giger2007-07-04-72/+4
| | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
| * | ppc4xx: Update lwmon5 boardStefan Roese2007-07-04-8/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add optional ECC generation routine to preserve existing RAM values. This is needed for the Linux log-buffer support - Add optional DDR2 setup with CL=4 - GPIO50 not used anymore - Lime register setup added Signed-off-by: Stefan Roese <sr@denx.de>
* | | Code cleanup and default config update for STC GP3 SSA board.Wolfgang Denk2007-07-06-137/+137
|/ / | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk2007-07-03-5/+5
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| * | Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-5/+5
| | | | | | | | | | | | | | | | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-25-19/+29
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| * | | Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk2007-06-22-19/+19
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| * | | Extend POST support for PPC440Igor Lisitsin2007-06-22-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
* | | | ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-47/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | ppc4xx: Maintenance patch for esd's CPCI405 derivatsMatthias Fuchs2007-06-25-21/+55
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | -add pci_pre_init() for pci interrupt fixup code -disable phy sleep mode via reset_phy() function -use correct io accessors -cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | | Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk2007-06-20-16/+16
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* | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-20-0/+11
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| * | | TQM5200: Add Flat Device Tree support, update default env. accordingly.Bartlomiej Sieka2007-06-08-0/+11
| | |/ | |/| | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
* | | ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval boardStefan Roese2007-06-19-1/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a board command to configure the I2C bootstrap EEPROM values. Right now 533 and 667MHz are supported for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 533 nor ;to configure the board for 533MHz NOR booting => bootstrap 667 nand ;to configure the board for 667MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Fix problem with NAND booting on AMCC AcadiaStefan Roese2007-06-19-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Change board/amcc/acadia/cpr.c to pll.cStefan Roese2007-06-19-0/+0
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Add initial lwmon5 board supportStefan Roese2007-06-15-0/+1892
|/ / | | | | | | | | | | | | This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
* | Coding Style cleanup; generate new CHANGELOG file.Wolfgang Denk2007-06-06-2/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-06-06-19/+9
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| * \ Merge branch 'mpc8641'Jon Loeliger2007-06-05-19/+5
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| | * | mpc8641 image size cleanupEd Swarthout2007-06-05-19/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | Merge branch 'mpc8641'Jon Loeliger2007-05-10-0/+4
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| | * | 8641hpcn: Fix Makefile after moving pixis to board/freescale.Ed Swarthout2007-05-08-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | | Merge with /home/wd/git/u-boot/custodian/u-boot-armWolfgang Denk2007-06-06-1683/+819
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| * | | | Reduce line lengths to 80 characters max.Peter Pearse2007-05-18-1/+2
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| * | | | Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-05-18-27/+488
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| * | | | Add the board directory for SMN42Peter Pearse2007-05-09-0/+796
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| * | | | Remove the deleted files for the SMN42 patchPeter Pearse2007-05-09-1430/+0
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| * | | | New board SMN42 branchPeter Pearse2007-05-09-253/+22
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* | | | Merge with /home/stefan/git/u-boot/acadia-nand-bootStefan Roese2007-06-06-4/+263
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| * | | | ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese2007-06-06-4/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-06-04-115/+260
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| * | | | ppc4xx: Add missing file for Bamboo NAND booting supportStefan Roese2007-06-01-0/+137
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese2007-06-01-109/+123
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generated by cgit v1.1 at 2024-12-25 06:30:36 +0000