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* at91sam9261ek.c: fix minor coding style issue.Wolfgang Denk2009-12-07-4/+5
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-11-24-1/+2
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| * OMAP3: pandora: fix booting without serial attachedGrazvydas Ignotas2009-11-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When the board is booted without serial cable attached (which is how most of them will be used) UART RX is left floating and sometimes picks noise, which interrupts countdown and enters U-Boot prompt instead of booting the kernel. Fix this by setting up internal pullup on UART RX pin. This does not prevent serial from working as the internal pullup is weak. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
* | mpc8260: move FDT memory node fixup into common CPU code.Marcel Ziswiler2009-11-22-52/+1
| | | | | | | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com> Tested-by: Heiko Schocher <hs@denx.de>
* | ppc4xx: Initialize magnetic coupler on VOM405 boardsMatthias Fuchs2009-11-17-0/+35
| | | | | | | | | | | | | | | | | | This patch fixes an ugly behavior of the IL712 magnetic coupler as used on VOM405. These parts will remember their last state over a power cycle which might cause unwanted behavior. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Initialize magnetic couplers in PLU405Matthias Fuchs2009-11-17-0/+36
|/ | | | | | | | | This patch fixes an ugly behavior of the IL712 magnetic couplers as used on PLU405. These parts will remember their last state over a power cycle which might cause unwanted behavior. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* 86xx: Remove redundant code in initdramBecky Bruce2009-11-04-15/+0
| | | | | | | | The same code exists both inside an #ifdef and outside of it. Remove the extra code for all the 86xx boards. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"Kumar Gala2009-11-04-10/+10
| | | | | | | | | | | This reverts commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc. There isn't any need to modify the API for fsl_pci_init_port to pass the status of host/agent(end-point) status. We can determine that internally to fsl_pci_init_port. Revert the patch that makes the API change. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* sh: Update lowlevel_init.S of espt-gigaNobuhiro Iwamatsu2009-10-30-9/+1
| | | | | | | There was the point that did not use write macro. Change to write macro. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* sh: Move some defs to convince 'pcrel too far'Nobuhiro Iwamatsu2009-10-30-54/+53
| | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Takashi Yoshii <yoshii.takashi@gmail.com>
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-3/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc85xx: Configure QE USB for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+36
| | | | | | | | Setup QE pin multiplexing for USB function, configure needed BCSRs and add some fdt fixups. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Configure QE UART for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-21/+78
| | | | | | | | | | | | To make QE UART usable by Linux we should setup pin multiplexing and turn UCC2 Ethernet node into UCC2 QE UART node. Also, QE UART is mutually exclusive with UART0, so we can't enable it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype board with eSDHC in 1- or 4-bits mode. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+6
| | | | | | | | SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+1
| | | | | | | | This patch sets memory window for Serial RapidIO on MPC8569E-MDS boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Add eLBC NAND support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-19/+11
| | | | | | | | Simply add some defines, and adjust TLBe setup to include some space for eLBC NAND. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Add eSDHC support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-1/+118
| | | | | | | | | | | | | | | | | | eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2 (in 1-bit mode). When eSDHC is used, we should switch u-boot console to UART1, and make the proper device-tree fixups. Because of an erratum in prototype boards it is impossible to use eSDHC without disabling UART0 (which makes it quite easy to 'brick' the board by simply issung 'setenv hwconfig esdhc', and not able to interact with U-Boot anylonger). So, but default we assume that the board is a prototype, which is a most safe assumption. There is no way to determine board revision from a register, so we use hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* xpedite5370: Enable multi-core supportPeter Tyser2009-10-27-4/+9
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-10/+10
| | | | | | | | | | | | | | | Originally written by Jason Jin and Mingkai Hu for mpc8536. When QorIQ based board is configured as a PCIe agent, then unlock/enable inbound PCI configuration cycles and init a 4K inbound memory window; so that a PCIe host can access the PCIe agents SDRAM at address 0x0 * Supported in fsl_pci_init_port() after adding pcie_ep as a param * Revamped copyright in drivers/pci/fsl_pci_init.c * Mods in 85xx based board specific pci init after this change Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
| | | | | Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
| | | | | | | The data being modified was in NOR flash which caused the crash. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* License cleanup: Fix license header for some esd display configurationsMatthias Fuchs2009-10-24-44/+102
| | | | | | | | | | | These files were autogenerated by EPSON configuration tools. This patch replaces the autogenerated file headers by the GPL license notice. This change is done with the explicit permission of Epson Research & Development / IC Software Development. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-10-24-81/+1646
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| * TI OMAP3 SDP3430: Initial SupportTom Rix2009-10-24-0/+703
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start of support of Texas Instruments Software Development Platform(SDP) for OMAP3430 - SDP3430 Highlights of this platform are: Flash Memory devices: Sibley NOR, Micron 8bit NAND and OneNAND Connectivity: 3 UARTs and expanded 4 UART ports + IrDA Ethernet, USB Other peripherals: TWL5030 PMIC+Audio+Keypad VGA display Expansion ports: Memory devices plugin boards (PISMO) Connectivity board for GPS,WLAN etc. Completely configurable boot sequence and device mapping etc. Support default jumpering and: - UART1/ttyS0 console(legacy sdp3430 u-boot) - UART3/ttyS2 console (matching other boards, and SDP HW docs) - Ethernet - mmc0 - NOR boot Currently the UART1 is enabled by default. for compatibility with other OMAP3 u-boot platforms, enable the #define of CONSOLE_J9. Conflicts: Makefile Fixed the conflict with smdkc100_config by moving omap_sdp3430_config to it is alphabetically sorted location above zoom1. Signed-off-by: David Brownell <david-b@pacbell.net> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * TI DaVinci: Adding Copyright for DM365 EVMSandeep Paulraj2009-10-24-0/+1
| | | | | | | | | | | | | | Forgot to add Copyright while submitting the patch. This patch adds the copyright. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci: DM355 Leopard: Fix compilation warningSandeep Paulraj2009-10-24-0/+1
| | | | | | | | | | | | | | | | | | | | We get a compliation warning when we enable the NAND driver for DM355 leopard. The waring we get is that we have an implicit declaration of davinci_nand_init. It is fixed by including the asm/arch/nand_defs.h header file Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI OMAP3: make gpmc_config as constNishanth Menon2009-10-24-3/+0
| | | | | | | | | | | | | | | | | | | | | | gpmc_config should not be a variant as it is board specific hence make it a const parameter Fixes issues identified by Dirk: - build issue for zoom2 - warnings for all other OMAP3 platforms using nand/onenand etc Signed-off-by: Nishanth Menon <nm@ti.com>
| * Zoom2 Fix serial gpmc setupTom Rix2009-10-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset to the chip select is incorrect. The change 187af954cf7958c24efcf0fd62289bbdb4f1f24e, omap3: embedd gpmc_cs into gpmc config struct introduced a problem with the serial gpmc setup. This patch reverts the chip select to its previous value. The symptoms of this problem are that the Zoom2 currently hangs. This was run tested on Zoom2. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * TI: DaVinci: DM355 Leopard board supportSandeep Paulraj2009-10-18-0/+155
| | | | | | | | | | | | | | This patch adds support for the leopard board which is based on the DM355 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM646x: Adding initial support for DM6467 EVMSandeep Paulraj2009-10-18-0/+85
| | | | | | | | | | | | | | This patch adds the initial support for DM6467 EVM. Other features like NET and NAND support will be added as follow up patches. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM365: Fix Compilation warning for DM365 EVMSandeep Paulraj2009-10-18-2/+2
| | | | | | | | | | | | | | This patch fixes a compilation warning while compiling the DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM355: Fix Compilation warning for DM355 EVMSandeep Paulraj2009-10-18-2/+2
| | | | | | | | | | | | | | This patch fixes a compilation warning while compiling the DM355 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * AT91 CPU9260 Fix machine ID when using a CPU9G20.Eric Benard2009-10-18-1/+1
| | | | | | | | | | Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * Clean-up of s3c24x0 drivers excluding nand driverkevin.morfitt@fearnside-systems.co.uk2009-10-13-72/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch re-formats the arm920t s3c24x0 driver files, excluding the nand driver, in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patches 1/4 and 2/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * s5pc1xx: add support SMDKC100 boardMinkyu Kang2009-10-13-0/+617
| | | | | | | | | | | | | | Adds new board SMDKC100 that uses s5pc100 SoC Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
* | ppc4xx: Sequoia: Add chip_config commandStefan Roese2009-10-23-232/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the Sequoia "bootstrap" command and replaces it with the now common command "chip_config". Please note that the patches with the dynamic PCI sync clock configuration have to be applied, before this one should go in. This is because Sequoia has 2 different bootstrap EEPROMs, and the old bootstrap command configured different values depending on the detected PCI async clock (33 vs. 66MHz). With the PCI sync clock patches, this is not necessary anymore. The PCI sync clock will be configured correctly on-the-fly now. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clockStefan Roese2009-10-23-3/+23
| | | | | | | | | | | | | | This patch now uses the 440EP(x)/GR(x) function to check and dynamically reconfigure the PCI sync clock. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Sequoia/Rainer: Check and reconfigure the PCI sync clockStefan Roese2009-10-23-3/+23
| | | | | | | | | | | | | | This patch now uses the 440EP(x)/GR(x) function to check and dynamically reconfigure the PCI sync clock. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc/P1_P2_RDB: On-chip BootROM supportDipen Dudhat2009-10-16-0/+12
| | | | | | | | | | | | | | | | | | On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2009-10-16-0/+17
| | | | | | | | | | | | | | | | | | NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from NAND Boot support on MPC8536DS. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | sbc8641d: fix LAW so board doesn't hang on DDR initPaul Gortmaker2009-10-16-1/+4
|/ | | | | | | | | | | | | | All versions between now and since this commit: commit bd76729bcbfd64b5d016a9b936f058931fc06eaf MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default will fail to allow the SBC8641D to get past DDR init, because the LAW config was overlapping. Eventually this board will do SPD EEPROM config, but for now this gets the board working again. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* at91: Update MEESC board supportDaniel Gorsulowski2009-10-13-7/+58
| | | | | | | | | | | This patch implements several updates: -disable CONFIG_ENV_OVERWRITE -add new hardware style variants and set the arch numbers appropriate -pass the serial# and hardware revision to the kernel -removed unused macros from include/configs/meesc.h -fixed multiline comment style Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
* TI: OMAP3: Overo Tobi ethernet supportOlof Johansson2009-10-13-31/+91
| | | | | | | | | | | | | Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp. This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Dirk Behme <dirk.behme@googlemail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
* TI: DaVinci DM365: Enabling network Support on DM365 EVMSandeep Paulraj2009-10-13-0/+43
| | | | | | | This patch enables EMAC on the DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* OMAP3: Clean up whitespace in mux configsOlof Johansson2009-10-13-1794/+1794
| | | | | | | | | | | Switch from space-based indentation to tab-based in mux configs, as pointed out by WD at: http://lists.denx.de/pipermail/u-boot/2009-September/061241.html Nothing but whitespace changes in this patch (diff -w gives no output). Signed-off-by: Olof Johansson <olof@lixom.net>
* Support for the OpenRD base boardSimon Kagstrom2009-10-13-0/+463
| | | | | | | The implementation is borrowed from the sheevaplug board and the Marvell 1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* Kirkwood: mv88f6281gtw_ge: Add kwbimage build supportPrafulla Wadaskar2009-10-13-0/+168
| | | | | | | | | | | This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board. To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Kirkwood: rd6281a: Add kwbimage build supportPrafulla Wadaskar2009-10-13-0/+170
| | | | | | | | | | | This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform. To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix2009-10-13-0/+433
| | | | | | | | | these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* Add support for Eukrea CPUAT91 SBCTom Rix2009-10-13-0/+132
| | | | | | | | | CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
generated by cgit v1.1 at 2024-11-30 23:59:13 +0000