| Commit message (Collapse) | Author | Age | Lines |
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Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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in ft_blob_update () for both boards was an unneccessary
repetition of code, which this patch moves in a common
function for this boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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The EEprom contains some Manufacturerinformation,
which are read from u-boot at boot time, and saved
in same hush shell variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
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As documented in doc/I2C_Edge_Conditions, adding a
board specific deblocking mechanism via CFG_I2C_INIT_BOARD
for the mgcoge and mgsuvd board.
This code was originally written by Keymile in association
with Anatech and Atmel in 1998. The Code toggels the SCL
until the SCA line goes to HIGH (max. 16 times).
And after this, a start condition is sent.
This is another approach to deblock the I2C Bus. The
soft I2C driver actually sends 9 clocks with SDA High,
and then a stop at the end, to deblock the I2C Bus.
Maybe we should use the approach from Keymile as
the new standard?
Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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There are some more extensions, which are for both boards
and some more boards from this manufacturer will follow soon.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Fix compiler warning introduced by commit 0f8cbc18
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.
This patch fixes screen_base alignment.
Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.
Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
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This is no longer necessary now that the GD_FLG_RELOC flag is set for
all ARM boards.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.
The change has been successfully tested on MPC8555CDS system.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
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The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.
Found this bug while trying to relocate a DDR memory at the base != 0.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch fixes USB 2.0 communication issues on some DU440 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.
Signed-off-by: Stefan Roese <sr@denx.de>
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Currently U-Boot crashes after relocation to RAM.
Changing the CPO value of the DDR SDRAM TIMING_CFG_2
register to READ_LAT + 1 (to the value it was before
conversion of socrates to new DDR code) fixes the
problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add function of smc911x, pkt_data_pull and pkt_data_push.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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After switching to using the CFI flash driver, the correct remapping
of the flash banks was forgotten.
Also, some boards were not adapted, and the old legacy flash driver
was not removed yet.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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netdev.h was not include by r2dplus.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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This is part of the switch to newer upstream MTD code.
Signed-off-by: Scott Wood <scottwood@freescale.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CMD_DATA_SIZE macro to enable it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- #if CFG_ENV_IS_IN_FLASH
- #if (CFG_ENV_IS_IN_FLASH == 1)
- #define CFG_ENV_IS_IN_FLASH 0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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This patch fixes a problem introdiced with patch
bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
initdram()].
The boards affected are:
- PCI405
- PPChameleonEVB
- quad100hd
- taihu
- zeus
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
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Also set up the port pins for using I2C.
Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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