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* arm: Add missing .vectors section to linker scriptsBenoît Thébaudeau2014-08-30-0/+6
| | | | | | | | | | Commit 41623c9 'arm: move exception handling out of start.S files' missed some linker scripts. Hence, some boards no longer had exception handling linked since this commit. Restore the original behavior by adding the .vectors section to these linker scripts. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* arm: convert Cygnus and NSP boards to KconfigSteve Rae2014-08-30-0/+58
| | | | | | Convert the bcm958300k and the bcm958622hr boards from "boards.cfg" to Kconfig. Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: add Cygnus and NSP boardsScott Branden2014-08-30-0/+62
| | | | | | | | | The bcm_ep board configuration is used by a number of boards including Cygnus and NSP. Add builds for the bcm958300k and the bcm958622hr boards. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* MAINTAINERS: change the status of vexpress board to OrphanMasahiro Yamada2014-08-30-1/+1
| | | | | | | | | | The email address of Matt Waddel is no longer working. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Alexei Fedorov <alexie.fedorov@arm.com>
* arm: bcm281xx: add board with Ethernet capabilitySteve Rae2014-08-30-0/+6
| | | | | | Add board which has Broadcom StarFighter2 Ethernet capability. Signed-off-by: Steve Rae <srae@broadcom.com>
* ARM: enable ARMv7 virt support for the Arndale boardAndre Przywara2014-08-30-0/+10
| | | | | | | | | | | | | To enable hypervisors utilizing the ARMv7 virtualization extension on the Arndale board, add the simple SMP pen address writer function and add the required configuration variables to switch all cores to HYP mode before launching the OS. This allows booting KVM and Xen directly from u-boot. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* arm: ep9315: Add .vectors section to lds and remove obsolete ldsSergey Kostanbaev2014-08-30-0/+1
| | | | | | | | | However ep9315 don't use interrupt vectors during startup, but _startup symbol is used inside uboot to calculate actual monitor size. Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* socfpga: initialize designware ethernetPavel Machek2014-08-30-9/+0
| | | | | | | | Enable initialization fo designware ethernet controller. With this patch, ethernet works in my configuration, provided I set ethernet address in the environment. Signed-off-by: Pavel Machek <pavel@denx.de>
* socfpga: Fix SOCFPGA build error for Altera dev kitChin Liang See2014-08-29-1/+1
| | | | | | | | | | | | | To fix the build error when build for Altera dev kit, not virtual target. At same time, set the build for Altera dev kit as default instead virtual target. With that, U-Boot is booting well and SPL still lack of few drivers. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-08-29-108/+270
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| * ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+32
| | | | | | | | | | | | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * am335x_evm: Convert CONFIG_CONS_INDEX into a menu choiceTom Rini2014-08-25-18/+17
| | | | | | | | | | | | | | | | | | | | - Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead - Add choice and help text to board/ti/am335x/Kconfig - Correct comment about IDK in board/ti/am335x/mux.c - Remove am335x_evm_uart* defconfig files as they're just variations on a config option now. Signed-off-by: Tom Rini <trini@ti.com>
| * cm-t54: fix eMMC boot mode checkDmitry Lifshitz2014-08-25-1/+1
| | | | | | | | | | | | | | | | | | | | Boot from eMMC boot partition corresponds to BOOT_DEVICE_MMC2 omap_bootmode, while BOOT_DEVICE_MMC2_2 corresponds to the user data partition boot. Fix mmc_get_env_part() boot mode check to use a correct value. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| * cm-t54: fix EEPROM read return value checkDmitry Lifshitz2014-08-25-2/+2
| | | | | | | | | | | | | | Fix cl_eeprom_read_mac_addr() return value check. Fix long line codding style issue in board_init(). Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| * keystone2: use EFUSE_BOOTROM information to configure PLLsVitaly Andrianov2014-08-25-8/+44
| | | | | | | | | | | | | | | | | | This patch reads EFUSE_BOOTROM register to see the maximum supported clock for CORE and TETRIS PLLs and configure them accordingly. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM. The Flash device is connected to GPMC controller on chip-select[0] and accessed as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and is CFI compatible. As multiple devices are share GPMC pins on this board, so following board settings are required to detect NOR device: SW5.1 (NAND_BOOTn) = OFF (logic-1) SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations: SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Also, following changes are required to enable NOR Flash support in dra7xx_evm board profile:
| * board/ti/dra7xx: add support for parallel NANDpekon gupta2014-08-25-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC chip-select[0] on DRA7xx EVM. As GPMC pins are shared by multiple devices, so in addition to this patch following board settings are required for NAND device detection [1]: SW5.9 (GPMC_WPN) = OFF (logic-1) SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */ SW5.2 (NOR_BOOTn) = OFF (logic-1) SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */ SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */ SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */ SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */ SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */ SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */ SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */ SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */ SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */ SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Following changes are required in board.cfg to enable NAND on J6-EVM:
| * board/ti/am43xx: add support for parallel NANDpekon gupta2014-08-25-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for NAND device connected to GPMC chip-select on following AM43xx EVM boards. am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a time either eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled by: (a) Statically using Jumper on connecter (J89) present on board. (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled by driving SPI2_CS0[MUX_MODE=GPIO] pin via software: SPI2_CS0 == 0: NAND (default) SPI2_CS0 == 1: eMMC am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI, Thus only one of the two can be used at a time. Selection is controlled by: (a) Dynamically driving following GPIO pin from software GPMC_A0(GPIO) == 0 NAND is selected (default) NAND device (MT29F4G08AB) on these boards has: - data-width=8bits - blocksize=256KB - pagesize=4KB - oobsize=224 bytes For above NAND device, ROM code expects the boot-loader to be flashed in BCH16 ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * board/ti/am335x: add support for beaglebone NOR Capepekon gupta2014-08-25-60/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support of NOR cape[1] for both Beaglebone (white) and Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC chip-select[0] and accesses as external memory-mapped device. This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device. As GPMC chip-select[0] can be shared by multiple capes so NOR profile is not enabled by default in boards.cfg. Following changes are required to enable NOR cape detection when building am335x_boneblack board profile. Signed-off-by: Tom Rini <trini@ti.com>
| * board/ti/am335x: add support for beaglebone NAND capepekon gupta2014-08-25-20/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Beaglebone Board can be connected to expansion boards to add devices to them. These expansion boards are called 'capes'. This patch adds support for following versions of Beaglebone(AM335x) NAND capes (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 Further information and datasheets can be found at [1] and [2] * How to boot from NAND using Memory Expander + NAND Cape ? * - Important: As BOOTSEL values are sampled only at POR, so after changing any setting on SW2 (DIP switch), disconnect and reconnect all board power supply (including mini-USB console port) to POR the beaglebone. - Selection of ECC scheme for NAND cape(a), ROM code expects BCH8_HW ecc-scheme for NAND cape(b), ROM code expects BCH16_HW ecc-scheme - Selction of boot modes can be controlled via DIP switch(SW2) present on Memory Expander cape. SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2) So to flash NAND, first boot via MMC or other sources and then switch to SW2[SWITCH_BOOT]=ON to boot from NAND Cape. - For NAND boot following switch settings need to be followed SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected ) SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- ) SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- ) SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- ) SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- ) SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device ) SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM ) SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device ) SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- ) [1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion [2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module *IMPORTANT NOTE* As Beaglebone board shares the same config as AM335x EVM, so following changes are required in addition to this patch for Beaglebone NAND cape. (1) Enable NAND in am335x_beaglebone board profile (2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because: - AM335x EVM has NAND device with datawidth=8, whereas - Beaglebone NAND cape has NAND device with data-width=16
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2014-08-29-1/+440
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| * | ARM: tegra: remove custom define for Jetson TK1Stephen Warren2014-08-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that Kconfig has a per-board option, we can use that directly rather than inventing a custom define for the AS3722 code to determine which board it's being built for. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add Colibri T30 board supportStefan Agner2014-08-18-0/+439
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This adds board support for the Toradex Colibri T30 module. Working functions: - SD card boot - eMMC environment and boot - USB host/USB client (on the dual role port) - Network (via ASIX USB) Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-166/+2474
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| * | mx6sxsabresd: Add Ethernet supportFabio Estevam2014-08-20-0/+116
| | | | | | | | | | | | | | | | | | | | | | | | mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031. Add support for one FEC port initially. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6sxsabresd: Convert to the new Kconfig styleFabio Estevam2014-08-20-0/+29
| | | | | | | | | | | | | | | | | | | | | mx6sxsabresd was not in the master branch when the conversion to the new Kconfig style happened, so convert it now so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | imx: ventana: add econfig commandTim Harvey2014-08-20-85/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Gateworks Ventana EEPROM contains a set of configuration bits that affect the removal of device-tree nodes that support peripherals that do not exist on sub-loaded boards. This patch adds: - a structure to define a config bit name, dt node alias, bit position - an array of supported configuration items - an econfig command to get/set/list configuration bits - use of the array when adjusting the FDT prior to boot Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: leave PCI reset de-asserted if PCI enabledTim Harvey2014-08-20-5/+3
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add iomux for PCISKT_WDIS# gpioTim Harvey2014-08-20-0/+17
| | | | | | | | | | | | | | | | | | | | | The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe sockets on the Ventana board. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: enable SION bit on gpio outputsTim Harvey2014-08-20-63/+70
| | | | | | | | | | | | | | | | | | | | | Enable the SION bit on gpio outputs that we wish to be able to read the value of. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: configure i2c_dis# pin properly for gw53xxTim Harvey2014-08-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was added to the GW53xx on revB PCB's). Additionally, remove the duplicate config for GW54xx. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add missing crlf to printTim Harvey2014-08-20-1/+1
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add video enable gpio pinmux for GW54xxTim Harvey2014-08-20-0/+2
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add appropriate delay following GSC i2c writeTim Harvey2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | The Gateworks System Controller EEPROM config is flash based. Add a delay following writes to avoid errors on back-to-back writes. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: remove caam disable per eeprom bitTim Harvey2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | During manufacturing this bit is not getting enabled when it should be, so we will ignore it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: set dynamic env var for flash layoutTim Harvey2014-08-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND devices have differing layouts with respect to page size and pages per block. These parameters affect the parameters that need to be passed to mkfs.ubifs and ubinize used to create UBI images. The various NAND chips supported by Gateworks Ventana fall into two different layouts which we refer to as 'normal' and 'large'. This layout is useful when referencing ubi files to download and flash so we create a dynamic env variable for it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | mx6sxsabresd: Update DDR initializationFabio Estevam2014-08-20-31/+58
| | | | | | | | | | | | | | | | | | | | | | | | Use the latest DDR initialization values suggested by the FSL hardware team. While at it, add some comments for clarification. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx31pdk: Change maintainerFabio Estevam2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently I don't have access to a mx31pdk board. Magnus was the original maintainer of the board and accepted to take back this role. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | embest/mx6boards: only toggle eMMC usdhc3 RST line on MarSboardIain Paton2014-08-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | On MarS usdhc3 is eMMC, on RIoT usdhc3 is uSD and eMMC is usdhc4. Don't run the MarS specific eMMC reset code on usdhc3 when board_type == BOARD_IS_RIOTBOARD Signed-off-by: Iain Paton <ipaton0@gmail.com>
| * | Update aristainetos board to KconfigStefano Babic2014-08-13-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | aristainetos board was merged in u-boot-imx before Kconfig was integrated, but it is not yet mainline. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-541/+16226
| |\ \ | | |/ | | | | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam2014-08-08-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-1219/+1963
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| * | | Add TQ Systems TQMa6 board supportMarkus Niebel2014-07-23-0/+971
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the changes to boards.cfg and the board directory under board/tqc. TQMa6 is a family of modules based on Freescale i.MX6. It consists of TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3 TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3 The modules need a baseboard. Initially the MBa6x starterkit mainboard is supported. To easy support for other mainboards the functionality is splitted in one file for the module (tqma6.c) and one file for the baseboard (tqma6_ mba6). The modules can be boot from eMMC (on USDHC3) and SPI flash. The following features are supported: - MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard) - Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module. The phy needs special configurations for the pad skew registers to adjust for the signal routing. Also support for standard ethernet commands and uppdate via tftp. - SPI: ECSPI1 with bootable serial flash on module and two additional chip selects on MBa6x - I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3) and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x are also configured. - USB: high speed host 1 on MBa6x and support for USB storage - PMIC: support for pfuze 100 on TQMa6<x> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * | | arm, imx6: add aristainetos boardHeiko Schocher2014-07-23-0/+716
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU: Freescale i.MX6DL rev1.1 at 792 MHz Board: aristaitenos I2C: ready DRAM: 1 GiB NAND: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB Display: lb07wv8 (800x480) - UART5 is console - MMC 0 and 1 - USB 0 and 1 - boot from mmc0 and spi nor flash - Splash screen support Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | | mx6: Remove duplication of iomuxc structureFabio Estevam2014-07-23-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to keep iomuxc_base_regs structure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers. The additional fields of iomuxc_base_regs are not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line. So remove iomuxc_base_regs structure and use iomuxc instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx6sxsabresd: Add PFUZE100 PMIC supportFabio Estevam2014-07-23-0/+84
| | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2014-07-16-23781/+2781
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Conflicts: boards.cfg
| * | | | mx6sx: Add initial support for mx6sxsabresd boardFabio Estevam2014-07-10-0/+206
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2014-08-29-25/+8
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generated by cgit v1.1 at 2024-12-02 14:58:06 +0000