| Commit message (Collapse) | Author | Age | Lines |
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B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.
B4860QDS Overview
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- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
ECC, 4 GB of memory in two ranks of 2 GB.
- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB of memory. Single rank.
- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
16x16 switch VSC3316
- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
8x8 switch VSC3308
- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
- B4860 UART port is available over USB-to-UART translator USB2SER or over
RS232 flat cable.
- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper
connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA
connector ports 0 and 2 for AMC mode.
- The B4860 configuration may be loaded from nine bits coded reset
configuration reset source. The RCW source is set by appropriate
DIP-switches:
- 16-bit NOR Flash / PROMJet
- QIXIS 8-bit NOR Flash Emulator
- 8-bit NAND Flash
- 24-bit SPI Flash
- Long address I2C EEPROM
- Available debug interfaces are:
- On-board eCWTAP controller with ETH and USB I/F
- JTAG/COP 16-pin header for any external TAP controller
- External JTAG source over AMC to support B2B configuration
- 70-pin Aurora debug connector
- QIXIS (FPGA) logic:
- 2 KB internal memory space including
- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
DDRCLK1, 2 and RTCCLK.
- Two 8T49N222A SerDes ref clock devices support two SerDes port clocks
- total four refclk, including CPRI clock scheme
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build date
information.
Add support to parse these fields to have complete FPGA image information.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.
So Update TLB and LAW size of NAND flash accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Static variables should be defined in C files, not header files, because
otherwise every C file that #includes the header file will generate a
duplicate of the variables. Since the vsc3316_xxx[] arrays are only
used by t4qds.c anyway, just put the variables there.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Lanes mux currently is configured in eth.c when initializing FMAN ethernet
ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to
p2041rdb.c which implements a board-specific initialization and will be
called at early stage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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This converts MPC8313ERDB NAND boot to use the new SPL infrastructure.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This was already used by some SPL targets, and allows the pad amount to
be specified by board config headers rather than only in makefile
fragments.
Also supply a pad-to of zero if the variable is undefined. It works
without this, but this avoids relying on undocumented behavior.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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By now U-Boot supports Qemu MIPS for little and big endian
as well as 32 bit and 64 bit. Update and fix the example usage
in the README to reflect this.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Using the example command from the README file does
not work as expected. qemu shows a text similar to
the one below and it hangs.
$ qemu-system-mips -L . -nographic
Could not open option rom 'pxe-pcnet.rom': No such file or directory
qemu-system-mips: pci_add_option_rom: failed to find romfile "vgabios-cirrus.bin"
qemu: terminating on signal 15 from pid 19726
This happens because qemu emulates a Malta board by
default if the machine type is not defined explicitely
on the command line.
For a working test, the '-M mips' switch is required:
$ qemu-system-mips -M mips -L . -nographic
Could not open option rom 'vgabios.bin': No such file or directory
U-Boot 2013.01-rc2-00132-g1e8e648-dirty (Jan 08 2013 - 09:06:42)
Board: Qemu -M mips CPU: 24Kf proc_id=0x19300
DRAM: 128 MiB
## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
Flash: 0 Bytes
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: NE2000
Hit any key to stop autoboot: 0
qemu-mips #
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
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The 'Limitations & comments' section refers to the
'-m mips' switch which is not valid. The '-m' switch
can be used for setting the virtual RAM size:
$qemu-system-mips --help | grep '^-m '
-m megs set virtual RAM size to megs MB [default=128]
$
The correct switch for specifying the machine type is '-M'.
Fix the text to refer to that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
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Add DVI output support and make it the default video output.
Currently the CLAA WVGA panel is supported, but this panel has to be purchased
separately, so using the DVI output as the default would allow more people to
try the splash screen feature on a mx51evk.
If someone still wants to use the CLAA WVGA, just set the panel variable as:
set panel claa
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Use a common watchdog driver for all these cpus.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Add support for the Seiko 4.3'' WVGA panel on mx53loco.
By default, the CLAA WVGA panel is selected.
In order to support the Seiko panel, the enviroment variable 'panel' must be
set to 'seiko'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD
from the main config file.
Following error was observed:
drivers/video/libvideo.o: In function `exynos_lcd_init':
/home/ajay/u-boot-samsung/drivers/video/exynos_fb.c:68: undefined reference to `lcd_set_flush_dcache'
This is because exynos video drivers have dependency on CONFIG_LCD.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chomium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Add device node for MAX77686
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch enables Vbus required for USB 2.0 controller.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch adds aliases for SPI.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Adds sound and codec device node parameters
Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch initialises I2C using FDT.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch adds aliases for I2C.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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FALCON MODE
Support for a new command (defined at envs) - spl_export generates
the ATAGS image necessary for fast boot. Afterwards, it is stored
at ext4 partition.
Generated image format:
CRC [4B] SIZE [4B] PAYLOAD(ATAGS/DT) [SIZE]
Remarks:
- CRC is calculated only for PAYLOAD
- SIZE is the size of PAYLOAD
It is important to adjust ${splsize} when large image is generated.
It is defined as hex, since ext4 related commands expect it.
The ${spladdr} environment variable corresponds to
CONFIG_SYS_SPL_ARGS_ADDR
Additionally definitions for DFU have been refactored and support for
EFI has been added as well.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Add device tree based ethernet driver for SMC911X controller on
SMDK5250 boards.
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch adds initial dts file for EXYNOS5250 SoC. This dts
file currently include only ethernet devices and properties. More
devices to be added in subsequent patches.
Also add the dts file for SMDK5250 board which uses the EXYNOS5250
dts file.
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Instead of using the serverip we get from the DHCP server, implicitly use
the broadcast address, which is automatically set when no ncip environment
variable is set. That way it isn't necessary to use a special DHCP
configuration to set the netconsole peer.
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This saves stack and code memory for local copy, and
consumes initialized data memory. For 22 of the 29
kirkwood-based boards, this results in a global saving
of about 30 bytes. For 7 of them, it results in an
increase of 6 to 14 bytes.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This patch removes 2 small portions of board specific code that are
duplicated with common ARM code and thus unnecessary. These 2 portions
of code concern the mach id that is given by u-boot to the Linux kernel
to identify the system's MACH.
The first one was the possibility to change the MACH thanks to the
'mach_id' enviroment variable. This is possible thanks to the 'machid'
env variable (see arch/arm/lib/bootm.c:boot_jump_linux()).
The seconde one is the setting of the bi_arch_number. This is already
done in arch/arm/lib/board.c:board_init_f() since km_arm.h does #define
CONFIG_MACH_TYPE.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
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On kmcoge5un we faced some serious problems with the memory during
temperature tests. Reason was that we overwrite some registers for
memory settings which have to leave untouched. These where registers
0x20148 , 0x2014c and 0x20154.
So writing these registers is prohibited and this patch removes them
from all km related config files. Even if the problem was only
seen on kmcoge5un.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
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Make the error handling more robust.
Check if each one of the PMIC writes fail and if they do, just return
immediately.
Also, print the cause for the failures.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) introduced an extra 'retval' variable, but this is not
necessary since we have already the variable 'ret' in place.
So use 'ret' to store the return values from the pmic related calls and remove
'retval'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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The on-board number of available usdhc devices is something board
specific. The patch moves CONFIG_SYS_FSL_USDHC_NUM out of
mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd
board.
To keep the default mmc device for environment same as before (usdhc3),
it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes
it to 1 for mx6qsabresd.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Use IMX_GPO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Since commit c733681 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) mx53loco fails to allocate the memory for PMIC:
U-Boot 2013.01-rc2-dirty (Dec 20 2012 - 15:55:01)
Board: MX53 LOCO
I2C: ready
DRAM: 1 GiB
pmic_alloc: No available memory for allocation!
pmic_init: POWER allocation error!
CPU: Freescale i.MX53 family rev2.0 at 800 MHz
Reset cause: POR
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Calling the PMIC related functions at a later stage, ie, from board_late_init()
fixes the issue.
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
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This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
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According to errata the AM335x device does not support internal delay
mode, so RGMII1_IDMODE and RGMII2_IDMODE must be set to 1.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
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Added macros to read SOM information from the I2C
EEPROM.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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Instead of passing individual registers by value to board_get_mem_timings,
pass a board_mem_timings structure pointer for the board files to fill in.
Pass same structure pointer to write_sdrc_timings. This saves about
90 bytes of space in SPL.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
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