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* powerpc/83xx/km: drop uneeded dtt_bus environment varHolger Brunck2013-02-15-8/+4
| | | | | | There is no need for a environment variable to configure the dtt bus. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/scripts: replace hardcoded uImageAndreas Huber2013-02-15-4/+6
| | | | | | | | Replace uImage with ${uimage}. If uimage is not set, default it to uImage. Signed-off-by: Andreas Huber <andreas.huber@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* powerpc/83xx/km: add MV88E6122 switch support for kmvect1Karlheinz Jerg2013-02-15-1/+74
| | | | | | | | | | | | | | | kmvect1 has a UEC2 connection to the piggy board and a UEC0 connection to the switch MV88E6122. This switch has a connection to a frontport ethernet interface. The ethernet port used for network booting is automatically selected by u-boot. If a Piggy is plugged, the Piggy port is selected (UEC2, eth1). If the Piggy isn't present, the Frontport is selected (UEC0, eth0). The switch reset is connected to a GPIO on the PRIO3 board FPGA (GPIO28) and released at startup. Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/common/ivm: rework piggy mac adress offset generationHolger Brunck2013-02-15-11/+17
| | | | | | | | | For the the kmvect1 board we will also need a functionality to add an offset to the IVMs MAC address, because these board will have two valid ethernet ports for debugging purpose. So move the code to an own function. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km82xx, km83xx: move ethernet_present() from common to cpu specificKarlheinz Jerg2013-02-15-12/+31
| | | | | | | | For kmvect1 we need a special solution and for km_arm boards we already have. So move the common code to the architectur specific file. Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/common/ivm: remove CONFIG_SYS_I2C_IVM_BUS related codeHolger Brunck2013-02-15-4/+0
| | | | | | | This define isn't set within our setup files. So we can safely remove the affected code. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/common/ivm: remove obsolete codeHolger Brunck2013-02-15-8/+0
| | | | | | | EEprom_ivm_addr isn't set in our environment, so remove the usage of this. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/common: remove unneeded ifdefs for I2CHolger Brunck2013-02-15-2/+0
| | | | | | | All boards from this serie use i2c. There is no need to #ifdef the header. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* x86: Remove eNET boardsSimon Glass2013-02-14-617/+0
| | | | | | | These are no longer used and should be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SKTom Rini2013-02-12-0/+27
| | | | | | | | In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-1199/+2961
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| * Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren2013-02-11-0/+317
| | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add generic Tegra114 build supportTom Warren2013-02-11-1/+1
| | | | | | | | | | | | | | This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+13
| | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add SPI SLINK driverAllen Martin2013-02-11-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+5
| | | | | | | | | | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra20: fdt: add SPI SFLASH nodeAllen Martin2013-02-11-0/+5
| | | | | | | | | | | | | | Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | | | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * am33xx: Drop gpio0_7_pin_mux from phytec pcm051Tom Rini2013-02-07-5/+0
| | | | | | | | | | | | | | | | This mux is not currently used and appears to be a carry-over from the am335x evm code. Acked-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP3: igep00x0: fix a build warning on IGEP boardsJavier Martinez Canillas2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | commit b689cd5 OMAP3: use a single board file for IGEP devices introduced the following build warning: igep00x0.h:168:24: warning: backslash-newline at end of file [enabled by default] This patch fixes the issue. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
| * Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
| * am335x: display msg when reading MAC from efuseLars Poeschel2013-02-07-1/+1
| | | | | | | | | | | | | | | | When ethaddr is not set in environment the MAC address is read from efuse. The message was only printed in debug case, but this message could be of interest for the ordinary user, so printf it. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| * pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+478
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP3: igep00x0: add boot status GPIO LEDJavier Martinez Canillas2013-02-07-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an GPIO LED boot status for IGEP boards. The GPIO LED used is the red LED0 while the Linux kernel uses the green LED0 as the boot status. By using different GPIO LEDs, the user can know in which step of the boot process the board currently is. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * OMAP3: use a single board file for IGEP devicesJavier Martinez Canillas2013-02-07-333/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when the IGEPv2 board and the IGEP Computer-on-Module are different from a form factor point of view, they are very similar in the fact that share many components and how they are wired. So, it is possible (and better) to have a single board file for both devices and just use the CONFIG_MACH_TYPE to make a differentiation between each board when needed. This change avoids code duplication by removing 298 lines of code and makes future maintenance easier. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * ARM: highbank: use wfi macro instead of inline asmRob Herring2013-02-03-1/+2
| | | | | | | | | | | | | | Older compilers don't recognize v7 wfi instruction, so use wfi macro to fix builds on old compilers. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * arm: rmobile: kzm9g: Adjust ETM trace clockTetsuyuki Kobayashi2013-02-02-1/+1
| | | | | | | | | | | | | | | | Set ETM TRCLK down to 78MHz to get clear wave form. This patch makes difference only when you use ETM trace connecting JTAG debugger. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * arm: rmobile: kzm9g: Adjust SDRAM settingTetsuyuki Kobayashi2013-02-02-3/+14
| | | | | | | | | | | | | | | | | | | | After stress test, I found some of kzm9g board occures memory failure. This patch adust SDRAM setting. - Enlarge drivability on both SDRAM controller and SDRAM itself - Raise core voltage Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-715/+1262
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| | * mx23evk: Add initial board supportOtavio Salvador2013-01-28-0/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following features are supported: * 128 MB DDR1 SDRAM * DUART * SD/MMC Card Socket Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mxs: mmc: mx23_olinuxino: Add MMC supportMarek Vasut2013-01-28-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the MMC attached to SSP1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Allow overriding default card detect implementationMarek Vasut2013-01-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXS based boards do not implement the card-detect signal. Allow user to specify alternate card-detect implementation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mx6qsabrelite: search mii phy address 4-7Troy Kisky2013-01-28-3/+21
| | | | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * mxs: Boost the memory power supplyMarek Vasut2013-01-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory power supply on MX23 didn't pump out enough juice into the DRAM chip, thus caused occasional memory corruption. Fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * imximage.cfg: run files through C preprocessorTroy Kisky2013-01-22-692/+769
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '#' used as comments in the files cause the preprocessor trouble, so change to /* */. The mkimage command which uses this preprocessor output was moved to arch/arm/imx-common/Makefile .gitignore was updated to ignore .cfgtmp files. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * woodburn: Set Write Protection GPIO as inputFabio Estevam2013-01-21-1/+2
| | | | | | | | | | | | | | | | | | Set Write Protection GPIO as input. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mxs: Add MX23 olinuxino board supportMarek Vasut2013-01-21-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MX23-based Olinuxino board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: clock: Use 'mxs' prefix for methodsOtavio Salvador2013-01-21-15/+15
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | tegra: fdt: sort dts filesAllen Martin2013-01-17-92/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: fdt: remove clocks nodesAllen Martin2013-01-17-127/+0
| | | | | | | | | | | | | | | | | | | | | These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: remove IRDA pinmux synonymAllen Martin2013-01-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this synonym and replace with UARTB to disambiguate. Signed-off-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Tegra30: fdt: Update DT files with I2C info for T30/CardhuTom Warren2013-01-16-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that T30 does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but DVC_I2C is still used to designate the controller intended for power control (PWR_I2C in the schematics). On Cardhu, it's used to access the PMU and EEPROM, as well as the audio codec, temp sensor, and fuel gauge devices from the OS. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Tegra30: Add/enable Cardhu build (T30 reference board)Tom Warren2013-01-16-0/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. include/configs/tegra-common.h now holds common config options for Tegra SoCs. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | Tegra30: Cardhu: Add DT filesTom Warren2013-01-16-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | tegra: enable LCD on PAZ00Marc Dietrich2013-01-16-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | This adds LCD panel descriptions to the device tree of PAZ00 and enables LCD support in the configuration. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: display: add board pinmuxMarc Dietrich2013-01-16-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Boards may require a different pinmux setup for DISPALY than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Enable LCD on TECThierry Reding2013-01-16-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | The TEC ships with a 7" LCD panel that provides a resolution of 800x480 pixels. Add a corresponding panel description to the device tree and enable LCD support in the configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Enable LCD on Medcom-WideThierry Reding2013-01-16-0/+32
| |/ | | | | | | | | | | | | | | | | The Medcom-Wide has a 15" LCD panel with a resolution of 1366x768 pixels. Add a corresponding panel description to the device tree and enable LCD support in the configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Clean up libfdt.h includesGerald Van Baren2013-02-08-1/+0
| | | | | | | | | | | | | | | | | | | | The libfdt.h file is the definition file for libfdt. It is unnecessary to include other fdt header files (the necessary ones are pulled in by libfdt.h). Signed-off-by: Gerald Van Baren <gvb@unssw.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-29 03:15:00 +0000