| Commit message (Collapse) | Author | Age | Lines |
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Enable CONFIG_OF_CONTROL so that U-Boot on these three boards uses a device
tree for its configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a new ramboot config for glacier so that it is possible to test U-Boot
loaded over Ethernet instead of using JTAG.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move these options to Kconfig and remove them from the CONFIG files.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Many CONFIG options have an unnecessary value of 1. CONFIG_440 is set in
the various board config files. Also simplify the CONFIG_440 check in
config.mk
Signed-off-by: Simon Glass <sjg@chromium.org>
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New board/intel/galileo board directory with minimum codes, plus
board dts, defconfig and configuration files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.
This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).
Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Signed-off-by: Bo Shen <voice.shen@atmel.com>
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The sama5d4ek support boot up from NAND flash, SD/MMC card and
also the SPI flash.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Conflicts:
include/splash.h
Signed-off-by: Tom Rini <trini@ti.com>
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We now have api functions that can support compiling simplefb code as its own
module. Since this code is not part of the display functionality, extract it
to its own file.
Raspberry Pi is updated to accommodate the changes.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Josh Wu <josh.wu@atmel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
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Currently by running the following test:
=> setenv bootcmd reset
=> save
=> reset
, we observe a hang after approximately 20-30 minutes of stress reboot test.
Investigation of this issue revealed that when a single DDR chip select is used,
the hang does not happen. It only happens when the two chip selects are active.
MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":
"The controller must keep the memory lines quiet (except for CK) for the ZQ
calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
for other ZQCL and 64 for ZQCS)."
According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:
"Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"
So make sure to activate one chip select at time (CS0 first and then CS1 later),
so that the required JEDEC delay is respected for each chip select.
With this change applied the board has gone through three days of reboot stress
test without any hang.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Since a clock function setup_gpmi_io_clk is implemented for GPMI
IO clock settings, change to use this common function in GPMI setup.
Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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- use linux display timing settings
- change backlight duty cycle 500ns
- some defaultenvironment changes
- change fit_addr_r to 0x14000000 as needed if
MAX_LOCKDEP_SUBCLASSES in linux gets increased.
- Environment now at 0xd0000 in nand flash
Signed-off-by: Heiko Schocher <hs@denx.de>
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Move board/compulab/common/splash.c code to
common/splash_source.c to make it available for everybody. This move
renames cl_splash_screen_prepare() to splash_source_load(), and
the compilation of this code is conditional on CONFIG_SPLASH_SOURCE.
splash_source features:
* Provide a standardized way for declaring board specific splash screen
locations
* Provide existing routines for auto loading the splash image from the
locations as declared by the board
* Introduce the "splashsource" environment variable, which makes it
possible to select the splash image source.
cm-t35 and cm-fx6 are updated to use the modified version.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Add support for splash screen.
The splash screen is loaded from the SPI flash and is displayed on the
HDMI display.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[grinberg@compulab.co.il: minor code and commit message updates]
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
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Add support for loading splash from sf.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[grinberg@compulab.co.il: staticize the sf global variable]
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
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Define a generic way for boards to define splash image locations:
- introduce struct splash_location
- introduce enum splash_storage
- update cl_splash_screen_prepare() to take an array of above struct
and select the appropriate one based on the splashsource environment
variable (if it is not defined- use the first splash location as default).
cm-t35 is updated to work with the new interface.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Move storage device specific code into its own function instead of
calling it directly from an otherwise storage device independent
function (cl_splash_screen_prepare).
This is a preparation for supporting multiple splash locations.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Use errno values to improve return reporting.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Add support for hdmi console.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Obtain 2nd NIC MAC address from baseboard EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Implement the option to select the eeprom i2c bus when reading mac
address.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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When passing eth address to Linux via dtb, the "local-mac-address"
property should be set for "/soc/aips-bus@02100000/ethernet@02188000",
not "/fec".
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Currently we only support the Micron MT41K128M16JT-125 ddr3 chip.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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We need this way for SPL boot.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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To support different ddr3 memory sizes we should start using
imx_ddr_size(..) instead of the define PHYS_SDRAM_SIZE.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Fix warning due to missing prototype for writel
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
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Add board level spl support for mx6sxsabresd board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This patch adds the new Barco platinum platform. It currently
includes those two boards:
platinum-titanium
-----------------
This is the same board as the titanium that is already supported in
mainline U-Boot. But its now moved to this new platform to support
multiple "flavors" of imx6 boards in one directory. Its also moved
to support SPL booting. And with this we use the run-time DDR
configuration of this SPL support. The board is equipped with the
Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
related registers tuples from the imximage.cfg file. As all this
is done in the SPL at run-time.
platinum-picon
--------------
This board is new and based on the MX6DL with 1GiB DDR using the
Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
chips (each 512MiB).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Pieter Ronsijn <pieter.ronsijn@barco.com>
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Since commit 1f98e31bc0b2c37a ("imx: mx6sxsabresd: Use the pfuze common init
function") board_late_init() became empty, so we can safely remove this unneeded
function.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Compile code with -fPIC to get GOT. Do not build SPL
with fPIC because it increasing SPL size for nothing.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.
It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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This patch fixes the following compilation warning for maxbcm:
Building maxbcm board...
text data bss dec hex filename
160075 6596 38240 204911 3206f ./u-boot
board/maxbcm/maxbcm.c: In function 'reset_phy':
board/maxbcm/maxbcm.c:68:6: warning: unused variable 'reg' [-Wunused-variable]
u16 reg;
^
board/maxbcm/maxbcm.c:66:6: warning: unused variable 'devadr' [-Wunused-variable]
u16 devadr = CONFIG_PHY_BASE_ADDR;
^
Additionally support Spansion SPI NOR flash is added. With larger SPI device
support via the CONFIG_SPI_FLASH_BAR define.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds SPL support to the db-mv784mp-gp eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds SPL support to the maxbcm MV78460 based board. Including
the fixed DDR configuratrion needed for the DDR training code. And the
the serdes PHY init code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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With this patchset the Marvell bin_hdr (DDR training) code is intergrated
into mainline U-Boot. We can remove the placeholder file again, which was
only introduced to make U-Boot compile and link again.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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Use the STATUS_LED APIs for indicating a boot progress instead of
show_boot_progress.
This patch also fixes a problem introduced with commit b3f4ca1135 (dm: omap3:
Move to driver model for GPIO and serial). After that commit the board doesn't
boot. Looks like the problem is the gpio_request call inside the function
show_boot_progress.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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This patch allows to configure all the important DRAM parameters in Kconfig.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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In addition to the current Android magic settings, allow to optionally use
DDR3 timing parameters, which are tailored for different clock frequencies
and JEDEC speed bins. This should improve reliability and performance.
Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig
allows to use timings, which are calculated for the DDR3-1066F speed bin.
A lot of DDR3 chips, which are used in real Allwinner based devices,
support DDR3-1066F speed bin timings.
And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work
with any DDR3 chips, because this targets the slowest JEDEC speed bins.
The vendor magic values are still used by default for DRAM, but board
maintainers now have more flexibility in DRAM timings selection.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an
unstable image when active low v or hsync is used.
The problem seems to be specific to the OLinuxIno A13 (normal & micro)
boards. I've just looked up the schematics and they use an opendrain driver
for the vga sync lines, and with sync pulses it is the logical high->low
edge of the pulse which counts for the timing, which with an active low
sync is being driven by the pull-up, and that simply seems to not drive
it hard enough to get a stable image.
So force v and hsync active high on these boards. independent of what the
modeline says. This fixes the unstable image.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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