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* Add Boundary Devices Nitrogen6X boardsEric Nelson2013-03-13-0/+2039
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx23_olinuxino: Fix warning for implicit declarationOtavio Salvador2013-03-07-0/+1
| | | | | | | | | | | | | | Fixes a build warning of implicit declaration of gpio_direction_output, as bellow: ,---- | mx23_olinuxino.c: In function 'board_early_init_f': | mx23_olinuxino.c:51:2: warning: implicit declaration | of function 'gpio_direction_output' | [-Wimplicit-function-declaration] `---- Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mx6: Provide a structure for accessing HDMI registersFabio Estevam2013-03-07-17/+11
| | | | | | | | Provide a structure for accessing HDMI registers, so that we can use proper read/write accessors. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx23_olinuxino: Enable USB supportOtavio Salvador2013-03-07-0/+9
| | | | | | This enabled USB support for the mx23_olinuxino board. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mx23_olinuxino: Add support for status LEDOtavio Salvador2013-03-07-0/+11
| | | | | | | This allow user to know if the bootloader is running, even without a serial console. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mx23evk: Adjust DRAM control register to use full 128MB of RAMOtavio Salvador2013-03-07-0/+10
| | | | | | | Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full 128MB of RAM. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: m28: Enable power to USB port 0Marek Vasut2013-03-07-0/+4
| | | | | | | | | | The USB port 0 can now be used alongside the USB port 1, thus enable power to it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* i.MX6: consolidate pad names for multi-CPU boardsEric Nelson2013-03-07-215/+215
| | | | | | | | | | | Rename all i.MX6 pad declarations to MX6_PAD_x, so a board may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo (MX6DL) by including the proper header. Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd only support MX6Q, so they include mx6q_pins.h. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX6: mx6qsabrelite: indent with tabsEric Nelson2013-03-07-53/+53
| | | | | | | This patch has no functional changes and simply replaces leading spaces with tabs. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2013-03-05-1004/+0
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| * ARM: ns9750dev: remove remainders of dead boardWolfgang Denk2013-02-28-1004/+0
| | | | | | | | | | | | | | | | Commit 8b710b1 started removing code for the unmaintained "ns9750dev" board; the board support is still broken, and not included anywhere in the Makefile or boards.cfg. Remove the remaining dead code. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2013-02-23-8235/+4349
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| * omap3: mvblx: pass FPGA version to the kernelMichael Jones2013-02-18-1/+13
| | | | | | | | | | | | Extract FPGA version from the .rbf and pass this info to the kernel. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
| * omap3: mvblx: select fpgafilename according to orientationMichael Jones2013-02-18-0/+24
| | | | | | | | | | | | | | | | Rather than load the FPGA file from the FAT partition, look at entry in system EEPROM to decide which file to retrieve directly from the EXT3 partition. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
| * OMAP3: igep00x0: Add new IGEP COM PROTON.Enric Balletbo i Serra2013-02-18-0/+3
| | | | | | | | | | | | | | The IGEP COM PROTON is a new ultra compact module design with an on-board ethernet controller. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
| * OMAP3: igep00x0: use official board names.Enric Balletbo i Serra2013-02-18-2/+2
| | | | | | | | | | | | | | This trivial patch only changes current boards names for the official names. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
| * am335x_evm: enable support for booting via USBIlya Yanok2013-02-18-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds necessary config options and a new build target, am335x_evm_usbspl, to enable usb booting and fixes board_eth_init() function to take into account that we may have USB ether support in SPL now. This uses the same MAC for both cpsw and USB, in order to match ROM behavior. The usbspl build target does not contain UART SPL, CPSW SPL or extra environment settings, so that we may fit within our binary size constraint. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Signed-off-by: Tom Rini <trini@ti.com>
| * am33xx: pcm051: Remove wp pin mux for sd-cardLars Poeschel2013-02-18-1/+0
| | | | | | | | | | | | | | | | The pcm051 does not have the wp pin connected to the sd-card socket. Therefore remove the pinmux for the pin. The was a carry-over from the am335x evm code. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| * beagle: expansion boards: add LSR COM6L adapterrobertcnelson@gmail.com2013-02-18-0/+6
| | | | | | | | | | | | | | | | http://www.lsr.com/wireless-products/com6l The eeprom on this expansion board requires 16bit addressing. Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
| * beagle: expansion boards: retry i2c_read with 16bit addressingrobertcnelson@gmail.com2013-02-18-0/+8
| | | | | | | | | | | | | | Some expansion boards now ship with at24 eeproms that need to communicate via 16bit addressing. Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
| * x86: Remove eNET boardsSimon Glass2013-02-14-617/+0
| | | | | | | | | | | | | | These are no longer used and should be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
| * am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SKTom Rini2013-02-12-0/+27
| | | | | | | | | | | | | | | | In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-1199/+2961
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| | * Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren2013-02-11-0/+317
| | | | | | | | | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * Tegra114: Add generic Tegra114 build supportTom Warren2013-02-11-1/+1
| | | | | | | | | | | | | | | | | | | | | This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * tegra: add SPI SLINK driverAllen Martin2013-02-11-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * tegra20: fdt: add SPI SFLASH nodeAllen Martin2013-02-11-0/+5
| | | | | | | | | | | | | | | | | | | | | Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * am33xx: Drop gpio0_7_pin_mux from phytec pcm051Tom Rini2013-02-07-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | This mux is not currently used and appears to be a carry-over from the am335x evm code. Acked-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
| | * OMAP3: igep00x0: fix a build warning on IGEP boardsJavier Martinez Canillas2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit b689cd5 OMAP3: use a single board file for IGEP devices introduced the following build warning: igep00x0.h:168:24: warning: backslash-newline at end of file [enabled by default] This patch fixes the issue. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
| | * Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
| | * am335x: display msg when reading MAC from efuseLars Poeschel2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | When ethaddr is not set in environment the MAC address is read from efuse. The message was only printed in debug case, but this message could be of interest for the ordinary user, so printf it. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| | * pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+478
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
| | * OMAP3: igep00x0: add boot status GPIO LEDJavier Martinez Canillas2013-02-07-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an GPIO LED boot status for IGEP boards. The GPIO LED used is the red LED0 while the Linux kernel uses the green LED0 as the boot status. By using different GPIO LEDs, the user can know in which step of the boot process the board currently is. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| | * OMAP3: use a single board file for IGEP devicesJavier Martinez Canillas2013-02-07-333/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when the IGEPv2 board and the IGEP Computer-on-Module are different from a form factor point of view, they are very similar in the fact that share many components and how they are wired. So, it is possible (and better) to have a single board file for both devices and just use the CONFIG_MACH_TYPE to make a differentiation between each board when needed. This change avoids code duplication by removing 298 lines of code and makes future maintenance easier. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| | * ARM: highbank: use wfi macro instead of inline asmRob Herring2013-02-03-1/+2
| | | | | | | | | | | | | | | | | | | | | Older compilers don't recognize v7 wfi instruction, so use wfi macro to fix builds on old compilers. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| | * arm: rmobile: kzm9g: Adjust ETM trace clockTetsuyuki Kobayashi2013-02-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Set ETM TRCLK down to 78MHz to get clear wave form. This patch makes difference only when you use ETM trace connecting JTAG debugger. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| | * arm: rmobile: kzm9g: Adjust SDRAM settingTetsuyuki Kobayashi2013-02-02-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After stress test, I found some of kzm9g board occures memory failure. This patch adust SDRAM setting. - Enlarge drivability on both SDRAM controller and SDRAM itself - Raise core voltage Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| | * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-715/+1262
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| | * | tegra: fdt: sort dts filesAllen Martin2013-01-17-92/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: fdt: remove clocks nodesAllen Martin2013-01-17-127/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: remove IRDA pinmux synonymAllen Martin2013-01-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this synonym and replace with UARTB to disambiguate. Signed-off-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra30: fdt: Update DT files with I2C info for T30/CardhuTom Warren2013-01-16-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that T30 does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but DVC_I2C is still used to designate the controller intended for power control (PWR_I2C in the schematics). On Cardhu, it's used to access the PMU and EEPROM, as well as the audio codec, temp sensor, and fuel gauge devices from the OS. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra30: Add/enable Cardhu build (T30 reference board)Tom Warren2013-01-16-0/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. include/configs/tegra-common.h now holds common config options for Tegra SoCs. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | Tegra30: Cardhu: Add DT filesTom Warren2013-01-16-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | tegra: enable LCD on PAZ00Marc Dietrich2013-01-16-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds LCD panel descriptions to the device tree of PAZ00 and enables LCD support in the configuration. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: display: add board pinmuxMarc Dietrich2013-01-16-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards may require a different pinmux setup for DISPALY than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-12-22 18:36:43 +0000