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* p1020rdb-pd: platform supportHaijun.Zhang2013-08-09-3/+4
| | | | | | | | | | | | | | Add new board p1020RDB-PD. P1020RDB-PD board was update from P1020RDB. DDR changed from DDR2 1G to DDR3 2G. NAND: 128 MiB Flash: 64 MiB Also change P1020RDB to P1020RDB-PC to distinguish from P1020RDB board. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Scott Wood <scottwood@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* powerpc/mpc8xxx: Add memory reset controlYork Sun2013-08-09-8/+28
| | | | | | | | | JEDEC spec requires the clocks to be stable before deasserting reset signal for RDIMMs. Clocks start when any chip select is enabled and clock control register is set. This patch also adds the interface to toggle memory reset signal if needed by the boards. Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/t4240qds: Adjust DDR timing for RDIMMYork Sun2013-08-09-10/+9
| | | | | | | RDIMM has different timing. Tested RDIMM is MT18JSF1G72PDZ-1G9E1 for dual rank. Single- and quad-rank are not tested due to availability. Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/T4240EMU: Add T4240EMU targetYork Sun2013-08-09-105/+274
| | | | | | | | | | | | Add emulator support for T4240. Emulator has limited peripherals and interfaces. Difference between emulator and T4240QDS includes: ECC for DDR is disabled due the procedure to load images No board FPGA (QIXIS) NOR flash has 32-bit port for higher loading speed IFC and I2C timing don't really matter, so set them fast No ethernet Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/corenet: Move RCW print to cpu.cYork Sun2013-08-09-58/+3
| | | | | | | The RCW print is common for all corenet platforms. Not necessary to ducplicate in each board file. Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/85xx: Add TWR-P10xx board supportXie Xiaobo2013-08-09-0/+544
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TWR-P1025 Specification: ----------------------- Memory subsystem: 512MB DDR3 (on board DDR) 64Mbyte 16bit NOR flash One microSD Card slot Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC3: Connected to Atheros AR8035 GETH PHY UART: Two UARTs are routed to the FDTI dual USB to RS232 convertor USB: Two USB2.0 Type A ports I2C: AT24C01B 1K Board EEPROM (8 bit address) QUICC Engine: Connected to DP83849i PHY supply two 10/100M ethernet ports QE UART for RS485 or RS232 PCIE: One mini-PCIE slot Signed-off-by: Michael Johnston <michael.johnston@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> [yorksun: Fixup include/configs/p1_twr.h] Signed-off-by: York Sun <yorksun@freescale.com>
* dt: don't use ARCH_CPU_DTSStephen Warren2013-08-02-3/+3
| | | | | | | | | Now that we assume dtc supports the -i option, we don't need to use ARCH_CPU_DTS in *.dts{,i}; we simply specify the include filename directly, and dtc will find it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* xilinx: move microblaze-generic .dts to standard locationStephen Warren2013-08-02-1/+0
| | | | | | | | | | Aside from microblaze, all other SoCs/boards/vendors store their DT files in board/$vendor/dts/$soc-$board.dts. Move microblaze-generic.dts to this location for consistency. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <monstr@monstr.eu>
* powerpc/ppc4xx: Convert new gdsys files to SPDX license tagsTom Rini2013-07-26-68/+4
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* powerpc/ppc4xx: Consider gdsys FPGA OSD sizeDirk Eibach2013-07-25-16/+18
| | | | | | | | OSD size was constant 32x16 characters. Now the size is set as announced by the FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc/ppc4xx: Support gdsys multichannel iocon hardwareDirk Eibach2013-07-25-39/+451
| | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc/ppc4xx: Add gdsys mclink interfaceDirk Eibach2013-07-25-0/+184
| | | | | | | mclink is a serial interface for communication between gdsys FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc/ppc4xx: Use generic accessor functions for gdsys FPGADirk Eibach2013-07-25-91/+167
| | | | | | | | | | A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-12/+27
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| * nds32: Convert Makefiles to use COBJS-y styleken kuo2013-07-25-8/+8
| | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * nds32: Enable two banks of SDRAM on Andes boardken kuo2013-07-24-2/+18
| | | | | | | | | | | | | | | | | | The original adp-ag101/adp-ag101p initialize only one bank(64MB) by default at boot time, but it is not enough for some application, so increasing to two banks(128M). Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_initGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to improper external function declaration, building U-Boot for the adp-ag102 board shows this warning: adp-ag102.c: In function 'pci_init_board': adp-ag102.c:95: warning: function declaration isn't a prototype Include the 'faraday/ftpci100.h' header which provides the proper declaration and remove the local declaration to get rid of the warning. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | qemu-malta: Update for SPDX license identifiersTom Rini2013-07-25-23/+3
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-07-25-0/+165
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
| * | MIPS: qemu-malta: bring up ethernetGabor Juhos2013-07-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: add PCI supportGabor Juhos2013-07-24-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: add reset supportGabor Juhos2013-07-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: add support for emulated MIPS Malta boardGabor Juhos2013-07-24-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-690/+117
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| * | vf610: Add I2C support for Vybrid VF610 platformAlison Wang2013-07-23-1/+13
| | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for Vybrid VF610 platform and adds I2C0 support to VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com>
| * | i2c, ppc4xx_i2c: switch to new multibus/multiadapter supportDirk Eibach2013-07-23-642/+57
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
| * | tegra: i2c: Enable new CONFIG_SYS_I2C frameworkSimon Glass2013-07-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Schocher <hs@denx.de>
| * | i2c, multibus, keymile: get rid of EEprom_ivm envvariableHeiko Schocher2013-07-23-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as the keymile boards use now the new i2c multibus/multiadapter framework, remove the EEprom_ivm Environmentvar, as not longer needed. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Holger Brunck <holger.brunck@keymile.com> Tested-By: Holger Brunck <holger.brunck@keymile.com>
| * | i2c, fsl_i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-43/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | - added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * | i2c, soft-i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-34/+37
| |/ | | | | | | | | | | | | | | | | - added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-36321/+2265
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* arm: at91sam9n12: change EBI IO to high drive modeBo Shen2013-07-22-1/+1
| | | | | | | | | | | | As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12 and share the lower 8 bits data line. If use low drive of the data line, it will cause DDR data access corrupt in lower address, so change the data line to high drive mode This will fix the Linux kernel boot issue when use Lower address Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ddr cfg: DRAM_RESET needs 0x00020030Troy Kisky2013-07-20-1/+1
| | | | | | | | | | | | | | | | | The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mpc85xx: Add gdsys ControlCenter Digital boardDirk Eibach2013-07-16-0/+2171
| | | | | | | | | | | | | | | | | The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2x GbE - Lattice ECP3 FPGA connected via PCIe - mSATA RAID1 - USB host - DisplayPort video output - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
* arm:samsung:trats:fix: Restore proper orientation of TRATS's LCD panelŁukasz Majewski2013-07-16-9/+1
| | | | | | | | | | | | | | | | | | | | | | | Before setting: mipi_lcd_device.reverse_panel = 1, the Trats's LCD panel was flipped by 180 degrees. The flip was caused by following change: Exynos: Change get_timer() to work correctly SHA1: 3d00c0cb96ff93a929700b80d89cb905e5ab5315 This commit fixed udelay(), which is necessary (due to HW LCD controller oddity) for mipi-dsi correct operation. As a result the display orientation has been switched. As a follow up, the hwrevision() function has been removed, since it was used only in this particular place. Test HW: Trats Exynos4210 rev 0. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* PPC MPC83xx: Fix MPC8323ERDB build warningWolfgang Denk2013-07-15-1/+5
| | | | | | | | | | | | Fix: mpc8323erdb.c: In function 'mac_read_from_eeprom': mpc8323erdb.c:198:3: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Timur Tabi <timur@tabi.org> cc: Kim Phillips <kim.phillips@freescale.com>
* Revert "MIPS: Jz4740: Add qi_lb60 board support"Tom Rini2013-07-15-175/+0
| | | | | | | | | | The files board/qi/qi_lb60/qi_lb60.c and include/configs/qi_lb60.h were licensed under the GPL v3 or later, and not v2 or later. As this is incompatible with the project, revert this board support until the responsible parties are available to re-license (if so desired) under GPL v2. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-4311/+1060
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: tegra: enable LCD panel on VentanaStephen Warren2013-07-11-0/+32
| | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: enable LCD panel on HarmonyStephen Warren2013-07-11-0/+39
| | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-0/+1
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Tegra: FDT: Add USB EHCI function for T30/T114Jim Lin2013-07-11-0/+19
| | | | | | | | | | | | | | | | | | | | Add DT node for USB EHCI function. Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards. Signed-off-by: Jim Lin <jilin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-07-10-4304/+138
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| | * EXYNOS: Resolve the i2c compilation errorAmar2013-07-10-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch resolves the below mentioned compilation error of i2c driver for non-FDT case Compilation error: s3c24x0_i2c.c: In function 'board_i2c_init': s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use in this function) s3c24x0_i2c.c:544:18: note: each undeclared identifier is reported only once for each function it appears in s3c24x0_i2c.c:545:3: warning: implicit declaration of function Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde2013-07-05-4295/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS4210: Configure GPIO for uartRajeshwari Shinde2013-07-05-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS: LDS file move to commonRajeshwari Shinde2013-07-05-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused. It is renamed to exynos-uboot-spl.lds Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * SMDK5250: Remove reduntant codeRajeshwari Shinde2013-06-28-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enum boot_mode is defined twice once in spl.h and also in spl_boot.c, hence removing the same from spl_boot.c and including the header file. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS5: FDT: Add serial device node valuesRajeshwari Shinde2013-06-24-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the device node required for serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-12-25 18:33:30 +0000