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* tegra2: Add more pinmux functionsSimon Glass2011-10-27-31/+11
| | | | | | | | | | | | | This adds support for changing pinmux functions of pin groups. This is done by defining a PMUX_FUNC_... enum which can be used to select the function for each group using pinmux_set_func(). It is also possible to enable pullup/pulldown, and the existing tristate functionality is retained. Also provided is a means of configuring a list of pingroups by providing a configuration table to pinmux_config_table(). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename PIN_ to PINGRP_Simon Glass2011-10-27-9/+9
| | | | | | | | | | | The pin groupings are better named PINGRP, since on Tegra2 they refer to multiple pins. Sorry about this, but better to get it right now when there is only a small amount of code affected. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more clock functionsSimon Glass2011-10-27-81/+24
| | | | | | | | | | | | | This adds most of the clock functions required by board and driver code: -query and adjust peripheral clocks -query and adjust PLLs -reset and enable control These functions are plumbed in as required. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Clean up board code a littleSimon Glass2011-10-27-48/+20
| | | | | | | | | | | | This removes clock_init() and pinmux_init() which are names better suited to those respective modules. By moving board_init_f() to the bottom of the file we can remove the need for so many functions in the board.h header file. The only clock/pinmux/gpio init we need to do prior to relocation is for the UART. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename CLOCK_PLL_ID to CLOCK_IDSimon Glass2011-10-27-1/+1
| | | | | | | | | | | Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the code now deals with both PLL clocks and source clocks. This also tidied up the assert() to match the one sent upstream, and fixes an error in the PWM id. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* net: tftpput: Rename TFTP to TFTPGETSimon Glass2011-10-26-2/+2
| | | | | | | | This is a better name for this protocol. Also remove the typedef to keep checkpatch happy, and move zeroing of NetBootFileXferSize a little earlier since TFTPPUT will need to change this. Signed-off-by: Simon Glass <sjg@chromium.org>
* altera_tse: Add support for dedicated descriptor memoryJoachim Foerster2011-10-26-1/+9
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* Revert "km_arm: enable POST for these boards"Wolfgang Denk2011-10-24-32/+0
| | | | | | | | | This reverts commit a2da616311151ecfab8b8fcc510686fc3c0c9a21. THis was applied by accident - a more recent version of this change was already present, see commit 9400f8f 2011-10-05 22:03:11 +0200 km_arm: enable POST for these boards Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: xilinx_enet: drop unused !NET_MULTI driverMike Frysinger2011-10-23-4957/+0
| | | | | | | This driver doesn't support the NET_MULTI framework, and I can't find any boards/configs/files that reference this subdir, so punt it all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: emaclite: Move RX/TX ping pong initialization toMichal Simek2011-10-23-6/+12
| | | | | | Init RX/TX ping pong directly from board not in the driver. Signed-off-by: Michal Simek <monstr@monstr.eu>
* MPC85xx: remove broken "mpq101" boardWolfgang Denk2011-10-23-442/+0
| | | | | | | | | | | The board stopped building some time ago, and the board maintainer agrtees to drop it - see http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112674 Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alex Dubov <oakad@yahoo.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kumar Gala <galak@kernel.crashing.org>
* build: add missing $(AR)->$(cmd_link_o_target) updateMike Frysinger2011-10-22-13/+13
| | | | | | | | | Seems people fixed their files to use libfoo.o, but didn't actually update the creation targets to use $(cmd_link_o_target). Update the rest of the Makefile's found with grep. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Simon Glass <sjg@chromium.org>
* consolidate mdelay by providing a common function for all usersAnatolij Gustschin2011-10-22-12/+0
| | | | | | | | | There are several mdelay() definitions in the driver and board code. Remove them all and provide a common mdelay() in lib/time.c. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* adp-ag101: add board adp-ag101 supportMacpaul Lin2011-10-22-0/+133
| | | | | | | | Add evaluation board "adp-ag101" configuration file adp-ag101.h. Add adp-ag101.c board config and related settings. Add board adp-ag101 into boards.cfg Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* km/common: remove obsolete header fileHolger Brunck2011-10-22-4/+0
| | | | | | | | This header is unneeded due to code which was removed in the past. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Wolfgang Denk <wd@denx.de>
* km/common: fix ramfs development targetAndreas Huber2011-10-22-5/+17
| | | | | | | | | | Calucations of PRAM needs to take into account the 'rootfssize'. Memory available to the linux kernel 'mem=' is in all cases set to the total memory size minus the pram size. Signed-off-by: Andreas Huber <andreas.huber@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Wolfgang Denk <wd@denx.de>
* km/common: force set ethaddr only for KM kirkwood boardsHolger Brunck2011-10-22-0/+5
| | | | | | | | This prevents u-boot to print out "Can't overwrite "ethaddr"" each time a powerpc board starts. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Wolfgang Denk <wd@denx.de>
* km_arm: enable POST for these boardsValentin Longchamp2011-10-22-0/+32
| | | | | | | | | | | | The current km_arm boards have a Power-On test jumper. When this jumper is set, this triggers some Power-On tests on the board. This patch enables the support of this jumper for starting the memory_regions test when the jumper is set. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-21-56/+56
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: mpc85xx: Add inline GPIO acessor functions powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9) powerpc/85xx: Fix P2020DS booting powerpc/85xx: Update USB device tree status based on pin settings fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers powerpc/85xx: Add support for RMan LIODN initialization powerpc/85xx: Update device tree handling for SRIO powerpc/85xx: Update setting of SRIO LIODNs fm: Don't allow disabling of FM1-DTSEC1 fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
| * powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)Timur Tabi2011-10-20-8/+30
| | | | | | | | | | | | | | | | The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix P2020DS bootingKumar Gala2011-10-18-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The following commit removed the code that set odt_rd_cfg and odt_wr_cfg. With out this code P2020DS board will not boot: commit 712cf7ab0b58e51a69e339397457d3591b6b650e Author: York Sun <yorksun@freescale.com> Date: Mon Oct 3 09:19:53 2011 -0700 powerpc/mpc8xxx: Merge entries in DDR speed table Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpersShengzhou Liu2011-10-18-48/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add common function fdt_set_node_status() to assist in various locations that we set a nodes status. This function utilizes the status values that are part of the EPAPR spec (on power.org). fdt_set_status_by_alias() is based on fdt_set_node_status() but uses an alias string to identify the node to update. We also add some shortcut functions to help the common cases of setting "okay" and "disabled": fdt_status_okay() fdt_status_disabled() fdt_status_okay_by_alias() fdt_status_disabled_by_alias() Finally, we fixup the corenet_ds ethernet code which previously had a function by the same name that can be replaced with the new helpers. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* | ColdFire: Fix compilation with CONFIG_SYS_DRAMSZ1 definedstany MARCEL2011-10-19-0/+3
| | | | | | | | | | | | | | A temp variable was used but not declared, with CONFIG_SYS_DRAMSZ1 defined. This variable is now declared in the functione when needed. Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
* | ColdFire: Merge differentiated linking files into a sigle one by boardstany MARCEL2011-10-19-565/+0
| | | | | | | | | | | | | | | | The spa, stm, int, 32 and 16 linking files are identical so there is no need to differentiate them. A single lds file is now used, and _config rule are simplified. Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
* | ColdFire: Cleanup lds files for multiple defined symbolsstany MARCEL2011-10-19-685/+149
|/ | | | | | | | | Lds files cleened to remove multiple defined section and modified to be compliant with --gc-sections added for ColdFire platform in a previous patch. Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* sandbox: Add sandbox boardSimon Glass2011-10-17-0/+91
| | | | | | | This adds basic files for the sandbox board. The lds file is very simple since we can rely mostly on the linker defaults. Signed-off-by: Simon Glass <sjg@chromium.org>
* Replace space and tab checks with isblankJason Hobbs2011-10-17-4/+5
| | | | | | | These are various places I found that checked for conditions equivalent to isblank. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* MX5: Make IPU display output and pixel format configurableMarek Vasut2011-10-17-3/+3
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* VIDEO: MX5: Switch MX5 to CONFIG_VIDEOStefano Babic2011-10-17-15/+21
| | | | | | | | | | | | | | | | | The framebuffer driver for MX5 is based on CONFIG_LCD. In the current implementation, there is a serious bug because the required memory is allocated before relocation, but the driver knows only later which is the resolution of the display. The patch switches the driver to CONFIG_VIDEO and the memory is allocated by the driver itself. We also need to switch the vision2 board code and config file in the same commit so that this commit will be bisectable. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* punt unused clean/distclean targetsMike Frysinger2011-10-15-2290/+0
| | | | | | | | | | The top level Makefile does not do any recursion into subdirs when cleaning, so these clean/distclean targets in random arch/board dirs never get used. Punt them all. MAKEALL didn't report any errors related to this that I could see. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* powerpc/mpc8548cds: Code cleanup and refactoringchenhui zhao2011-10-13-65/+38
| | | | | | | | | | | | - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-10-12-0/+241
|\ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mips: MIPS: Jz4740: Add qi_lb60 board support MIPS: Jz4740: Add NAND driver MIPS: Ingenic XBurst Jz4740 processor support
| * MIPS: Jz4740: Add qi_lb60 board supportXiangfu Liu2011-10-12-0/+241
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000. About USB boot tool ------------------- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | powerpc/mpc8536ds: Invert SDHC_WP pin polarityXie Xiaobo2011-10-09-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write protected pin polarity does not follow the SD card standard in MPC8536 Rev 1.0 silicon. The MPC8536DS board invert the SDHC_WP pin as a workaround. However, this silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board. Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpc8536ds: Add eSPI support for MPC8536DSXie Xiaobo2011-10-09-4/+2
| | | | | | | | | | | | | | | | | | | | 1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS, so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width to 4-bit and enable SPI signals. 2. Add eSPI controller and SPI-FLASH definition. Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpc8xxx: Merge entries in DDR speed tableYork Sun2011-10-09-460/+472
|/ | | | | | | | | | | | | | | It is not necessary to keep multiple entries for the same setting in DDR speed tables. Merge them for smaller tables. Also restructure the tables for smaller size. Cleanup some typedefs. Enforce strict checking for speed table. If DIMM is running at higher than known speed, try to use the highest speed setting. If rank is unknown, it has to panic. Removed ODT overriding for P2020DS as it is not necessary. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* net: drop !NET_MULTI codeMike Frysinger2011-10-05-9/+1
| | | | | | | | | | | This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* km_arm: enable POST for these boardsValentin Longchamp2011-10-05-0/+33
| | | | | | | | | | | | The current km_arm boards have a Power-On test jumper. When this jumper is set, this triggers some Power-On tests on the board. This patch enables the support of this jumper for starting the memory_regions test when the jumper is set. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Prafulla Wadaskar <prafulla@marvell.com>
* TQM8xx: make room for growing code size due to I/O accessor cleanupWolfgang Denk2011-10-05-136/+2
| | | | | | | | | | | | | Commit "PPC: Cleanup tqm8xx_pcmcia.c" will clean up the PCMCIA code to use I/O accessors instead of plain volatile pointer accesses. This will result in about 300 byte bigger code. Fix custom linker script to make room for this. While we are at it, drop unmaintained u-boot.lds.debug linker script. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-04-35/+35
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: PPC: Fix socrates NAND problem PPC: Fix fsl_upm.c by renaming nand handling functions NAND: Make page, erase, oob size available via cmd_nand mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi NAND: Add -y option to nand scrub command NAND: Add nand read.raw and write.raw commands NAND: Really ignore bad blocks when scrubbing spl, nand: add 4bit HW ecc oob first nand_read_page function mxc_nand: fix a problem writing more than 32MB mxc_nand: fixed some typos (cosmetic) nand: increase chip_delay in mv kirkwood nand driver
| * PPC: Fix socrates NAND problemMarek Vasut2011-10-03-35/+35
| | | | | | | | | | | | | | | | | | nand.c:36: error: static declaration of 'nand_read_buf' follows non-static declaration /home/marex/u-boot/include/nand.h:139: error: previous declaration of 'nand_read_buf' was here Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-267/+3451
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * powerpc/mpc85xxcds: Fix PCI speedchenhui zhao2011-10-03-12/+12
| | | | | | | | | | | | | | | | The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc8548cds: Fix booting messagechenhui zhao2011-10-03-3/+3
| | | | | | | | | | | | Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
| * powerpc/p2041rdb: remove watch dog related codesShaohui Xie2011-10-03-12/+1
| | | | | | | | | | | | | | | | | | | | CPLD 2.2 removed board watch dog support due to the limitation of CPLD capacity after adding all the requested features, such as switch overriding. There is no pin-compatible upgrade part available for current PCB design. So remove codes related to it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p2041rdb: updated description of cpld commandShaohui Xie2011-10-03-8/+8
| | | | | | | | | | | | | | | | According to CPLD 2.2, the default configuration is changed, so updated the description of CPLD command, otherwise it will confusing. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p2041rdb: add more ddr frequencies supportShaohui Xie2011-10-03-1/+4
| | | | | | | | | | | | | | | | | | This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8SU-ACF). Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p2041rdb: set sysclk according to status of physical switch SW1Shaohui Xie2011-10-03-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8], software need to read the SW1 status to decide what the sysclk needs. SW1[8~6] : frequency 0 0 1 : 83.3MHz 0 1 0 : 100MHz others: 66.667MHz Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p2041rdb: update cpld reset command according to CPLD 2.0Shaohui Xie2011-10-03-7/+11
| | | | | | | | | | | | | | | | | | CPLD 2.0 provides a new register which bit[0] is set to '1' will reset board with initializing the CPLD registers to default values. And add bit[6] of register at offset 0x5 to use to enable flash bank selection. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driverYork Sun2011-09-29-11/+123
| | | | | | | | | | | | | | | | | | | | Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c. The unified driver can initialize data using DDR controller. No need to use DMA if just to initialze for ECC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-12-23 10:57:52 +0000