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* arm: rmobile: lager: Change to maximum CPU frequencyNobuhiro Iwamatsu2014-04-28-0/+6
| | | | | | | | Maximum CPU clock of R8A7790 that are used in lager board is 1.4GHz. This change to use the maximum clock in this board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: koelsch: Change to maximum CPU frequencyNobuhiro Iwamatsu2014-04-28-0/+7
| | | | | | | | Maximum CPU clock of R8A7791 that are used in koelsch board is 1.5GHz. This change to use the maximum clock in this board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: koelsch: Update QoS initializationNobuhiro Iwamatsu2014-04-28-17/+12
| | | | | | | This update QoS version 0.240 for ES1 and version 0.310 for ES2. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: lager: Update QoS initialization to version 0.955Nobuhiro Iwamatsu2014-04-28-7/+7
| | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: keolsch: Add support ES2 revision of R8A7791Nobuhiro Iwamatsu2014-04-28-40/+129
| | | | | | | | | There is koelsch where ES2 revision of R8A7791 was put on. This is different in Qos setting. This adds Qos setting for ES2 revision of R8A7791. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: lager: Remove NOR-Flash supportNobuhiro Iwamatsu2014-04-28-184/+0
| | | | | | | | Lagar board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash. This removed the setting of NOR-Flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: lager: Change name of the structureNobuhiro Iwamatsu2014-04-28-115/+115
| | | | | | | This changes from r8a7790_ to rcar_. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: koelsch: Remove NOR-Flash supportNobuhiro Iwamatsu2014-04-28-183/+0
| | | | | | | | Koelsch board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash. This removed the setting of NOR-Flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: koelsch: Change name of structureNobuhiro Iwamatsu2014-04-28-120/+120
| | | | | | | This changes from r8a7791_ to rcar_. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-21-47/+811
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| * am335x: Switch to CONFIG_SKIP_LOWLEVEL_INIT from guarding SPL or NOR_BOOTTom Rini2014-04-17-3/+3
| | | | | | | | | | | | | | | | | | | | In the case of SPL or NOR_BOOT (no SPL involved) we need to include certain code in the build. Use !CONFIG_SKIP_LOWLEVEL_INIT rather than CONFIG_SPL_BUILD || CONFIG_NOR_BOOT to make the code clearer, and to make supporting XIP QSPI boot clearer in the code. Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Wolfgang Denk <wd@denx.de>
| * omap3: zoom1: switch to generic ti_omap3_common config headerNishanth Menon2014-04-17-1/+0
| | | | | | | | | | | | | | | | ti_omap3_common contains a lot of common header definitions that help reduce the size of the zoom1 config file. So, use the generic header and customize as needed for the platform (example: no spl). Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP3: zoom1: enable LAN9211Nishanth Menon2014-04-17-2/+18
| | | | | | | | | | | | | | Zoom1 was wrongly setup for LAN91C96. Fix it by enabling LAN9211. Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP3: zoom1: Configure GPMC for EthernetNishanth Menon2014-04-17-6/+31
| | | | | | | | | | | | zoom1 uses LAN9211 configured over GPMC Chip Select 1. Signed-off-by: Nishanth Menon <nm@ti.com>
| * keystone2: net: add keystone ethernet driverKaricheri, Muralidharan2014-04-17-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | Ethernet driver configures the CPSW, SGMI and Phy and uses the the Navigator APIs. The driver supports 4 Ethernet ports and can work with only one port at a time. Port configurations are defined in board.c. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
| * k2hk: add support for k2hk SOC and EVMVitaly Andrianov2014-04-17-0/+635
| | | | | | | | | | | | | | | | | | | | | | | | | | | | k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please refer the ti/k2hk_evm/README for details on the board, build and other information. This patch add support for keystone architecture and k2hk evm. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
| * dra7xx_evm: Add QSPI_4 support, qspiboot build targetTom Rini2014-04-17-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad) read support as well. This means we can be given one of two boot device values, but don't care which it is, so perform a fixup on the QSPI_4 value. We add a qspiboot build target to better show how you would use QSPI as a boot device in deployment. When we boot from QSPI, we can check the environment for 'boot_os' to control Falcon Mode. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
| * a3m071: Make spl_start_uboot test like getenv_yesno doesTom Rini2014-04-17-1/+2
| | | | | | | | | | | | | | | | This change makes the behaviour slightly more rebust and will match other implementations which can use getenv_yesno directly. Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
| * am335x_evm: Make SPL_OS also check the boot_os variable for falcon modeTom Rini2014-04-17-1/+12
| | | | | | | | | | | | | | | | | | We use the same variable as a3m071 in the environment to determine if we should boot into Linux or U-Boot. This is useful on boards like Beaglebone Black or AM335x GP EVM where we have persistent storage for the environment. Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP3: beagle-xm: generate fake USB ethernet MAC address from dieidNishanth Menon2014-04-17-0/+11
| | | | | | | | | | | | | | | | Similar to OMAP5uEVM, PandaBoard, BeagleBoard-XM has a USB based ethernet without MAC address embedded. So fake a MAC address following the similar strategy used on OMAP5 and PandaBoard family. Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP: common: consolidate fake USB ethernet MAC address creationNishanth Menon2014-04-17-32/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | TI platforms such as OMAP5uevm, PandaBoard, use equivalent logic to generate fake USB MAC address from device unique DIE ID. Consolidate this to a generic location such that other TI platforms such as BeagleBoard-XM can also use the same. NOTE: at this point in time, I dont yet see a need for a generic dummy ethernet MAC address creation function, but if there is a need in the future, this can be further abstracted out. Signed-off-by: Nishanth Menon <nm@ti.com>
| * ARM: OMAP: remove sr32() from OMAP board codeWolfgang Denk2014-04-17-1/+1
| | | | | | | | | | | | | | | | | | | | Replace the custom sr32() bit manipulation function in arch/arm/cpu/armv7/omap3/board.c and board/ti/panda/panda.c by standard I/O accessors. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | usb: tegra: combine header fileStefan Agner2014-04-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | Combine the Tegra USB header file into one header file for all SoCs. Use ifdef to account for the difference, especially Tegra20 is quite different from newer SoCs. This avoids duplication, mainly for Tegra30 and newer devices. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: add Jetson TK1 boardStephen Warren2014-04-17-0/+263
| | | | | | | | | | | | | | | | Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: Tegra124 pinmux cleanupStephen Warren2014-04-17-167/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra124_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. There are differences in the set of drive groups. I have validated this against the TRM. There are differences order of pin definitions in pinmux.c; these previously had significant mismatches with the correct order:-( I adjusted a few entries in pinmux-config-venice2.h since the set of legal functions for some pins was updated to match the TRM. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: Tegra114 pinmux cleanupStephen Warren2014-04-17-180/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: Tegra30 pinmux cleanupStephen Warren2014-04-17-473/+473
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra30_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted one entry in pinmux-config-cardhu.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: Tegra20 pinmux cleanupStephen Warren2014-04-17-33/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: pinmux naming consistency fixesStephen Warren2014-04-17-90/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: prototype pinmux_init() in board.hStephen Warren2014-04-17-2/+6
|/ | | | | | | | | pinmux_init() is a board-level function, not a pinmux driver function. Move the prototype to a board header rather than the driver header. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* board:tricorder: always work with valid eeprom dataAndreas Bießmann2014-04-11-0/+2
| | | | | | | | | | | | | Commit 890880583d84607e36b52a785a96b167728bbf73 introduced EEPROM parsing and board detection but faild to return a valid tricorder_eeprom struct for backup case. When pressing S200 while reading EEPROM we ignore the value. We returned falsely a tricorder_eeprom struct with uninitialized data which is just garbage. Initialize it by zeroing the whole structure. Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de> Cc: Thomas Weber <thomas.weber@corscience.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm:board:trats2:FIX: Clear INFORM4 and INFORM5 registers at correct bootŁukasz Majewski2014-04-11-0/+13
| | | | | | | | | | | | | | During switch to device tree, commit 1ecab0f has removed this code. INFORM4 and INFORM5 registers are used by TRATS2 first stage bootloader for providing recovery. For normal operation, those two must be cleared out. This error emerges when one force reset from u-boot's command line for three times. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-7/+30
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * mmc: Add 'mmc rst-function' sub-commandTom Rini2014-04-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value in order for warm reset of the system to work. Details on this being required will be part of the eMMC datasheet. Also add using this command to the dra7xx README. * Whitespace fix by panto Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * board: ecovec: fix USB0 clock enableBaruch Siach2014-03-31-1/+1
| | | | | | | | | | | | | | Enable USB0 clock by resetting bit 20 of MSTPCR2. Leave other bits unchanged. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * board: ecovec: fix debug LEDs pin directionBaruch Siach2014-03-31-1/+1
| | | | | | | | | | | | | | All pins should be output. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * am335x_evm: Clarify when we build board_eth_initTom Rini2014-03-28-2/+16
| | | | | | | | | | | | | | | | If we build this function in cases where we would be discarding it anyhow we still end up with maybe unused warnings. Rather than litter the function with __maybe_unused, just spell out when to build it. Signed-off-by: Tom Rini <trini@ti.com>
| * axs101: flush DMA buffer descriptors before DMA transactons startsAlexey Brodkin2014-03-28-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU sets DMA buffer descriptors with data required for inetrnal DMA such as: * Ownership of BD * Buffer size * Pointer to data buffer in memory Then we need to make sure DMA engine of NAND controller gets proper data. For this we flush buffer rescriptor. Then we're ready for DMA transaction. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com>
| * kbuild: Rename UIMAGE to MKIMAGEMarek Vasut2014-03-28-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot uses the 'mkimage' tool to produce various image types, not only uImage image type. Rename the invocation name from UIMAGE to MKIMAGE. The following command was used to do the replacement: git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \ xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {} Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | arm: vf610: fix double iomux configuration for vf610twr boardMarcel Ziswiler2014-04-07-1/+0
| | | | | | | | | | | | Get rid of double VF610_PAD_DDR_A15__DDR_A_15 iomux configuration. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | arm: Handle .gnu.hash section in ldscriptsAndreas Färber2014-04-07-0/+1
| | | | | | | | | | | | | | | | | | | | Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | socfpga: Adding Clock Manager driverChin Liang See2014-04-07-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-arm into masterStefano Babic2014-04-04-2364/+2282
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | ARM: tegra: make all I2C ports open-drainStephen Warren2014-03-26-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C protocol requires open-drain IOs. Fix the Dalmore and Venice2 pinmux tables to configure the IOs correctly. Without this, Tegra may actively drive the lines high while an external device is actively driving the lines low, which can only lead to bad things. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-39/+84
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| | * sandbox: Add LCD driverSimon Glass2014-03-17-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Plumb in Chrome OS EC emulationSimon Glass2014-03-17-0/+30
| | | | | | | | | | | | | | | | | | Add board code to set up the Chrome OS EC on startup. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Move EC interface into common libraryVadim Bendebury2014-03-17-27/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common library for obtaining access to the Chrome OS EC. This is used by boards which need to talk to the EC. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Tested-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sh: ecovec: correct romImage address in commentBaruch Siach2014-03-14-1/+1
| | | | | | | | | | | | | | | | | | | | | romImage is set by CONFIG_ECOVEC_ROMIMAGE_ADDR to 0xA0040000. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * kbuild: rename SRCTREE to srctreeMasahiro Yamada2014-03-12-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for pointing to the top of source directory. (No difference between the two.) In Kbuild style, $(srctree) is used for instead. This commit renames SRCTREE to srctree and deletes the defition of SRCTREE. Note that SRCTREE in scripts/kernel-doc, scripts/docproc.c, doc/DocBook/Makefile should be keep. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-09-19 19:46:03 +0000