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* mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variableAnton Vorontsov2009-07-16-2/+1
| | | | | | | | Since we have simple hwconfig interface now, we don't need pci_external_arbiter variable any longer. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: MPC8315ERDB: Use hwconfig for board type selectionAnton Vorontsov2009-07-16-9/+5
| | | | | | | This patch simply converts the board to the hwconfig infrastructure. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: MPC837XEMDS: Fixup eSDHC nodes in device treeAnton Vorontsov2009-07-16-13/+24
| | | | | | | | | | | fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and also will fixup clock-frequency property. Plus, since DR USB and eSDHC are mutually exclusive, we should only configure the eSDHC if asked through hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: MPC837XERDB: Add support for FSL eSDHCAnton Vorontsov2009-07-16-0/+18
| | | | | | | | | | | | | | | | | | This patch adds support for eSDHC on MPC837XERDB boards. The WP switch doesn't seem to work on RDB boards though, the WP pin is always asserted (can see the pin state when it's in GPIO mode). FSL DR USB and FSL eSDHC are mutually exclusive because of pins multiplexing, so user should specify 'esdhc' or 'dr_usb' options in the hwconfig environment variable to choose between the devices. p.s. Now we're very close to a monitor len limit (196 bytes left using gcc-4.2.0), so also increase the monitor len by one sector (64 KB). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'asm-generic' of git://git.denx.de/u-boot-microblazeWolfgang Denk2009-07-16-168/+3
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| * asm-generic: Consolidate errno.h to asm-generic/errno.hMichal Simek2009-07-09-168/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch use blackfin errno.h implementation which correspond Linux kernel one. MIPS implemetation is different that's why I keep it. I removed ppc_error_no.h from Marvell boards which was the same too. I have got ack from ppc40x, blackfin, arm, coldfire and avr custodians. Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <monstr@monstr.eu>
* | aria: enable NAND flash supportWolfgang Denk2009-07-14-0/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | MPC512x: factor out common codeWolfgang Denk2009-07-14-334/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have 3 boards for the MPC512x it turns out that they all use the very same fixed_sdram() code. This patch factors out this common code into cpu/mpc512x/fixed_sdram.c and adds a new header file, include/asm-ppc/mpc512x.h, with some macros, inline functions and prototype definitions specific to MPC512x systems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* | mecp5123: fix build errorWolfgang Denk2009-07-14-8/+5
| | | | | | | | | | | | | | | | | | | | The mecp5123 board did not compile because the MSCAN Clock Control Registers were missing; these got added, but as an array instead of 4 individual registers. Adapt the code so it builds. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* | Merge branch 'master' of /home/wd/git/u-boot/masterWolfgang Denk2009-07-14-1937/+976
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| * \ Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-13-566/+503
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| | * | versatile: update config and merge to cfi flash driverJean-Christophe PLAGNIOL-VILLARD2009-07-12-515/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Peter Pearse <peter.pearse@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com>
| | * | at91: Introduction of at91sam9g10 SOC.Sedji Gaouaou2009-07-12-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a faster clock speed: 266/133MHz. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
| | * | at91: Introduction of at91sam9g45 SOC.Sedji Gaouaou2009-07-12-0/+431
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. On the board you can find 2 USART, USB high speed, a 480*272 LG lcd, ethernet, gpio/joystick/buttons. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
| | * | OMAP3 pandora: Fix CKE1 MUX setting to allow self-refreshGrazvydas Ignotas2009-07-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pandora is using both SDRC CSes. The MUX setting is needed for the second CS clock signal to allow the 2 RAM parts to be put in self-refresh correctly. Based on similar patch for beagle and overo by Jean Pihet and Steve Sakoman.
| | * | OMAP3 pandora: setup pulls for various GPIOsGrazvydas Ignotas2009-07-12-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set pullups or pulldowns for GPIOs which need them. Disable them for others, which have external pulls. Also make disabled pull setting consistent (some pins had type set to "up" even if pull type selection was disabled).
| | * | OMAP3 pandora: setup pin mux for pins used on rev3 boardsGrazvydas Ignotas2009-07-12-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup pin mux for GPIO pins connected on rev3 or later boards. Also change NUB2 IRQ pin. This should not affect older boards because they don't have any nubs (analog controllers) attached to them.
| | * | OMAP3 pandora: pin mux cleanupGrazvydas Ignotas2009-07-12-25/+0
| | |/ | | | | | | | | | | | | Remove configuration of not unused pins, effectively leaving them in safe mode.
| * | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2009-07-13-1371/+473
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| | * | sh: Add support ESPT-GIGA boradNobuhiro Iwamatsu2009-07-11-0/+443
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ESPT-Giga is SH7763-based reference board. Board support is relatively sparse, presently supporting serial, gigabit ethernet, USB host, and MTD. More information (in Japanese) available at: http://www.cente.jp/product/cente_hard/ESPT-Giga.html Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | sh: Revised the build with newest compilerNobuhiro Iwamatsu2009-07-08-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The check of data became severe from newest gcc. This patch checked in gcc-4.2 and 4.3 . Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | sh: unify linker scriptJean-Christophe PLAGNIOL-VILLARD2009-07-08-1065/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | all sh boards use the same cpu linker script so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk tested on r2dplus Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | sh: make the linker scripts more genericJean-Christophe PLAGNIOL-VILLARD2009-07-08-309/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | currently we need to sync the linker script enty and TEXT_BASE manualy and the reloc_dst is based on it instead provide it now from the ldflags tested on r2dplus Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | sh7785lcr: fix out of tree buildJean-Christophe PLAGNIOL-VILLARD2009-07-08-1/+1
| | |/ | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | board support patch for phyCORE-MPC5200B-tinyJon Smirl2009-07-10-0/+348
|/ / | | | | | | | | | | | | | | | | | | Add support for the Phytec phyCORE-MPC5200B-tiny. Code originally from Pengutronix.de. Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on Timer 0/1 Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-07-08-2/+4
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| * | ppc4xx: Fix FDT EBC mappings on CanyonlandsFelix Radensky2009-07-08-2/+4
| |/ | | | | | | | | | | | | | | | | | | This patch fixes 2 problems with FDT EBC mappings on Canyonlands. First, NAND EBC mapping was missing, making Linux NAND driver unusable on this board. Second, NOR remapping code assumed that NOR is always on CS0, however when booting from NAND NOR is on CS3. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | mtd: nand: new base driver for memory mapped nand devicesMike Frysinger2009-07-07-101/+0
| | | | | | | | | | | | | | | | | | The BF537-STAMP Blackfin board had a driver for working with NAND devices that are simply memory mapped. Since there is nothing Blackfin specific about this, generalize the driver a bit so that everyone can leverage it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | davinci_nand chipselect/init cleanupDavid Brownell2009-07-07-0/+28
|/ | | | | | | | | | | | | | | | | Update chipselect handling in davinci_nand.c so that it can handle 2 GByte chips the same way Linux does: as one device, even though it has two halves with independent chip selects. For such chips the "nand info" command reports: Device 0: 2x nand0, sector size 128 KiB Switch to use the default chipselect function unless the board really needs its own. The logic for the Sonata board moves out of the driver into board-specific code. (Which doesn't affect current build breakage if its NAND support is enabled...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Coding style cleanup; update CHANGELOGWolfgang Denk2009-07-07-37/+37
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-07-2204/+1400
|\ | | | | | | | | | | | | Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * MX31: Add NAND SPL boot support to i.MX31 PDK board.Magnus Lilja2009-07-06-0/+97
| | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * arm nomadik: allow Nand and OneNand to coexistsAlessandro Rubini2009-07-06-0/+4
| | | | | | | | | | | | | | | | | | The evaluation kit has both Nand and OneNand, both drivers are there and the two configurations only select a different default for the jffs partition. This adds the OneNand driver and cleans up storage. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * arm nomadik: rename board to nhk8815Alessandro Rubini2009-07-06-1/+1
| | | | | | | | | | | | | | | | This is an error in my side in the initial submission: nobody calls it ""nmdk8815", it's "nomadik hardware kit", nhk8815, instead. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * xscale: add support for the polaris boardStefano Babic2009-07-06-10/+12
| | | | | | | | | | | | | | The Polaris board is based on the TrizepsIV module of Keith & Koep (http://www.keith-koep.com). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * xscale: fix USB initialization for Trizepsiv moduleStefano Babic2009-07-06-2/+3
| | | | | | | | | | | | | | | | Due to change in the usb_board_init() prototype, the USB for the TrizepsIV was not correctly initialized. Removed dummy print from usb_board_stop(). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * at91: Add esd gmbh MEESC board supportDaniel Gorsulowski2009-07-06-0/+291
| | | | | | | | | | | | | | This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * MX31: Add basic support for Freescale i.MX31 PDK board.Magnus Lilja2009-07-06-0/+116
| | | | | | | | | | | | | | | | | | | | | | Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board). This patch assumes that some other program performs the actual NAND boot. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Fabio Estevam <fabioestevam@yahoo.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP3EVM: fix typo. replace CS6 by CS5, no functionality changeMatthias Ludwig2009-07-06-8/+8
| | | | | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
| * at91sam9260/9263: add back up for the rst(reset controller).Sedji Gaouaou2009-07-06-3/+15
| | | | | | | | | | | | | | | | | | On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was set to 0 after being set to 500 ms for the PHY reset. Do backup the old reset length and restore it after the MACB initialisation. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: Stelian Pop <stelian@popies.net>
| * integrator: merge integratorap and integratorcpJean-Christophe PLAGNIOL-VILLARD2009-06-23-819/+286
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * integratorap/cp: use cfi driverJean-Christophe PLAGNIOL-VILLARD2009-06-23-1039/+0
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * integratorap/cp/versatile: remove non used functionsJean-Christophe PLAGNIOL-VILLARD2009-06-23-56/+0
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * integratorcp: split timer supportJean-Christophe PLAGNIOL-VILLARD2009-06-23-141/+180
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * integratorap: split timer supportJean-Christophe PLAGNIOL-VILLARD2009-06-23-135/+172
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * integratorap: split pci supportJean-Christophe PLAGNIOL-VILLARD2009-06-23-374/+407
| | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
| * at91: unify nor boot supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-798/+0
| | | | | | | | | | | | the lowlevel init sequence is the same so unify it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9263ek: add nor flash supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-3/+287
| | | | | | | | | | | | this will allow you to store use it for the env and to boot directly U-Boot from Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91: add support for the PM9261 board of Ronetix GmbHIlko Iliev2009-06-21-0/+700
| | | | | | | | | | | | | | | | | | | | The PM9261 board is based on the AT91SAM9261-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9261.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * pm9263: use macro instead of hardcode value for the lowlevel_initJean-Christophe PLAGNIOL-VILLARD2009-06-21-2/+2
| | | | | | | | | | | | | | optimize a few the RAM init Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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