| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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The board select menu in arch/arm/Kconfig is still big.
To slim down it, this commit moves AT91 boards to
arch/arm/mach-at91/Kconfig.
Also, consolidate "config SYS_SOC" in each board Kconfig.
The Kconfig files under board/ directory were modified with the
following command:
find board -name Kconfig | xargs sed -i -e '
/config SYS_SOC/ {
N
/default "at91"/ {
N
d
}
}
'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Prefix mmu.h PAGE_xxx definitions with MMU_ in order to prevent a naming
conflict with other definitions.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of
creating its own. There are some #ifdefs required in start.S. Future work
will hopefully remove these.
This series is available at u-boot-dm, branch sunxi-working.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The link register value can be required on some boards (e.g. FEL mode on
sunxi) so use a branch instruction to jump to save_boot_params() instead
of a branch link.
This requires a branch back to save_boot_params_ret so adjust the users
to deal with this. For exynos just drop the function since it doesn't
do anything.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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This is not used anymore since the procedure was split into a simple
read function and a later alaysis.
The ivm_read_eeprom name is now used for the previous
ivm_simple_read_eeprom function.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This allows to first read the IVM content (earlier in the boot sequence)
and define the ethaddr env variable thanks to the ivm_read_eepromi().
Later, the IVM content can be parsed and used to define some hush
variables, when the hush subsystem is available thanks to
ivm_analyze_eeprom().
To avoid the HW read to happen twice, the buffer passed to
ivm_read_eeprom() has to be reused by ivm_analyze_eeprom (and thus
allocated before calling ivm_read_eeprom()).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
writing to it corrupts relocation table.
This patch removes the global ddr3_size variable and uses local one
instead.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
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The value in SDRAM_REF_CTRL controls the delay time between
the initial rising edge of DDR_RESETn to rising edge of DDR_CKE
(JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL
should be written with a value corresponding to 500us delay before
starting DDR initialization sequence, and configure proper
value at the end of sequence.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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The README describes the recovery method which can be used if the NAS box
is not reachable anymore. Addionally, it describes the different boot
scripts.
Signed-off-by: Michael Walle <michael@walle.cc>
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G2D core should be provided 200MHz clock rate.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Some exynos boards require special handling of nRESET_OUT line for eMMC
memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards.
This will support eMMC reset using DT from reset_misc of samsung common
board file.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Move this option to Kconfig and update all boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Remove driver model CONFIGs from the board config headers and use Kconfig
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Remove driver model CONFIGs from the board config headers and use Kconfig
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This also displays the "Board:" line in the bootup text with the
generic board support code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Adjust Kconfig to default to driver model for glacier, canyonlands and
arches.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable CONFIG_OF_CONTROL so that U-Boot on these three boards uses a device
tree for its configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a new ramboot config for glacier so that it is possible to test U-Boot
loaded over Ethernet instead of using JTAG.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move these options to Kconfig and remove them from the CONFIG files.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Many CONFIG options have an unnecessary value of 1. CONFIG_440 is set in
the various board config files. Also simplify the CONFIG_440 check in
config.mk
Signed-off-by: Simon Glass <sjg@chromium.org>
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Initialization of ACTLR.SMP is in lowlevel_init.
This remove duplicate function.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This file was missed in the commit
https://patchwork.ozlabs.org/patch/427801/
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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SILK is an entry level development board based on R-Car E2 SoC (R8A7794)
This commit supports the following peripherals:
- SCIF, I2C, Ethernet, QSPI, MMC, USB Host
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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New board/intel/galileo board directory with minimum codes, plus
board dts, defconfig and configuration files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.
This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).
Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Signed-off-by: Bo Shen <voice.shen@atmel.com>
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The sama5d4ek support boot up from NAND flash, SD/MMC card and
also the SPI flash.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Conflicts:
include/splash.h
Signed-off-by: Tom Rini <trini@ti.com>
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We now have api functions that can support compiling simplefb code as its own
module. Since this code is not part of the display functionality, extract it
to its own file.
Raspberry Pi is updated to accommodate the changes.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Josh Wu <josh.wu@atmel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
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Currently by running the following test:
=> setenv bootcmd reset
=> save
=> reset
, we observe a hang after approximately 20-30 minutes of stress reboot test.
Investigation of this issue revealed that when a single DDR chip select is used,
the hang does not happen. It only happens when the two chip selects are active.
MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":
"The controller must keep the memory lines quiet (except for CK) for the ZQ
calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
for other ZQCL and 64 for ZQCS)."
According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:
"Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"
So make sure to activate one chip select at time (CS0 first and then CS1 later),
so that the required JEDEC delay is respected for each chip select.
With this change applied the board has gone through three days of reboot stress
test without any hang.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Since a clock function setup_gpmi_io_clk is implemented for GPMI
IO clock settings, change to use this common function in GPMI setup.
Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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- use linux display timing settings
- change backlight duty cycle 500ns
- some defaultenvironment changes
- change fit_addr_r to 0x14000000 as needed if
MAX_LOCKDEP_SUBCLASSES in linux gets increased.
- Environment now at 0xd0000 in nand flash
Signed-off-by: Heiko Schocher <hs@denx.de>
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