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* u8500: Separating mmc config parameters from driverJohn Rigby2012-09-01-5/+130
| | | | | | | | | | Configuration in vexpress and u8500.v1 is different from what is needed in u8500.v2. As such, card configuration specifics need to reside in the board file rather than the driver. Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
* u8500: Enabling power to MMC device on AB8500 V2Mathieu J. Poirier2012-09-01-0/+5
| | | | | | | | | Register mapping has changed on power control chip between the first and second revision. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
* u8500: Moving processor-specific functions to cpu area.Mathieu J. Poirier2012-09-01-74/+1
| | | | | | | | | | Functions such as providing power to the MMC device and reading the processor version register should be in the cpu area for access by multiple u8500-based boards. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
* snowball: applying power to LAN and GBF controllersMathieu J. Poirier2012-09-01-0/+87
| | | | | | | | LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
* snowball: Adding architecture dependent initialisationMathieu J. Poirier2012-09-01-2/+1
| | | | | | | Enabling timers and clocks in PRCMU and cleaning up mailbox. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
* u8500: Moving prcmu to cpu directoryMathieu J. Poirier2012-09-01-222/+2
| | | | | | | | This is to allow the prcmu functions to be used by multiple u8500-based processors. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
* snowball: Add support for ux500 based snowball boardMathieu J. Poirier2012-09-01-0/+960
| | | | | | | | | | | Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Tom Rini <trini@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
* davinci: enbw_cmc: change switch init behaviourHeiko Schocher2012-09-01-33/+69
| | | | | | | | | | | | | | | | | | | change the behaviour of switch initialization: - rename "pwl" to "lan" in hwconfig parameter "lan" = port 1 with phy addr 2 "lmn" = port 2 with phy addr 3 - if we have a valid switch config file in flash, do not evaluate the settings in the hwconfig "lan" or "lmn" subcommand. - if we have no valid switch config file in flash, start the switch with default values, if we have a "lan" or a "lmn" hwconfig subcommand. If no "lan" or "lmn" is found in hwconfig, do nothing with the switch. Signed-off-by: Heiko Schocher <hs@denx.de>
* da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu2012-09-01-0/+41
| | | | | | | | | | Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* am335x evm: Enable support for spi0Tom Rini2012-09-01-0/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* am335x evm: Enable MMC1 pinmuxTom Rini2012-09-01-0/+16
| | | | | | | MMC1 is available in profile 2 on the GP EVM and is exposed on the expansion header on beaglebone. Signed-off-by: Tom Rini <trini@ti.com>
* am335x evm: Initial support for AM335x GP EVM ProfilesTom Rini2012-09-01-4/+42
| | | | | | | | | The AM335x GP EVM can have one of 8 different profiles selected. Each profile has a different set of peripherals and requires different pinmux configurations that conflict with other profiles. i2c1 is an example of a conflicted mux currently. Signed-off-by: Tom Rini <trini@ti.com>
* sc_sps_1: Adjust board config to use 'mxs' SoC codeOtavio Salvador2012-09-01-4/+4
| | | | | | | Fix build failure due the move of mx28 code to 'mxs' SoC. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Add SchulerControl SC_SPS_1 platformMarek Vasut2012-09-01-0/+325
| | | | | | | | | | | This i.MX28 platform supports the following: * 2x FEC ethernet * USB on USBH0 * I2C EEPROM * SPI NVRAM * LEDs Signed-off-by: Marek Vasut <marex@denx.de>
* MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut2012-09-01-42/+0
| | | | | | | | This gets us rid of duplication of the same file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* vision2: do not overwrite the consoleFabio Estevam2012-09-01-2/+9
| | | | | | | On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx51evk: do not overwrite the consoleFabio Estevam2012-09-01-1/+9
| | | | | | | On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: mx53loco: do not overwrite the consoleStefano Babic2012-09-01-6/+6
| | | | | | | | | On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-01-4/+4
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-6/+6
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* Add support for Bluegiga APX4 Development KitVeli-Pekka Peltola2012-09-01-0/+375
| | | | | | | | | | This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de>
* at91: Add support for taskit AT91SAM9G20 boards.Markus Hubig2012-09-01-0/+382
| | | | | | | | | | This adds support for the AT91SAM9G20 boards by taskit GmbH. Both boards, Stamp9G20 and PortuxG20, are integrated in one file. PortuxG20 is basically a SBC built around the Stamp9G20. Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
* arm : Atmel : add at91sam9x5ek board supportBo Shen2012-09-01-0/+346
| | | | | | | | | | | | Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* OMAP3: fix DRAM size for IGEP-based boards.Enric Balletbò i Serra2012-09-01-6/+6
| | | | | | | | The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the LPDDR memory consist on two dies of 256MiB. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
* am33xx: Rework pinmux functionsTom Rini2012-09-01-25/+35
| | | | | | | | | | - Move definition of the EEPROM contents to <asm/arch/sys_proto.h> - Make some defines a little less generic now. - Pinmux must be done by done by SPL now. - Create 3 pinmux functions, uart0, i2c0 and board. - Add pinmux specific to Starter Kit EVM for MMC now. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Add support for TI AM335x StarterKit EVMTom Rini2012-09-01-0/+10
| | | | | | | | | | - Board requires gpio0 #7 to be set to power DDR3. - Board uses DDR3, add a way to determine which DDR type to call config_ddr with. - Both of the above require filling in the header structure early, move it into the data section. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Remove board/ti/am335x/evm.cTom Rini2012-09-01-200/+1
| | | | | | | | | The intention has always been (and boards are to support) an i2c EEPROM that will identify what hardware they are, allowing a single binary to support multiple boards. As such, remove the 'evm.c' file as there is nothing EVM centric in it currently, only SoC peripheral configuration. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: igep00x0: add SPL support for IGEP-based boardsJavier Martinez Canillas2012-09-01-68/+82
| | | | | | | This patch adds SPL support for IGEP-based boards. Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
* OMAP3: igep00x0: Add config option to choose flash storage memoryJavier Martinez Canillas2012-09-01-0/+8
| | | | | | | | IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Add a configuration option for to choose which memory to use. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
* am335x_evm: CPSW supportChandan Nath2012-09-01-0/+91
| | | | | | | | | This patch adds board-specific initialization for CPSW on TI AM335X based boards. Tested on BeagleBone. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split board-specific part into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am335x_evm: read the on-board EEPROMIlya Yanok2012-09-01-2/+70
| | | | | | | | Read the on-board EEPROM during startup to detect the version of the board we are running on (as for now only BeagleBone vs EVM detection is supported). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: pin mux defintions for CPSW switchChandan Nath2012-09-01-0/+47
| | | | | | | | | This patch adds pin mux settings for CPSW switch found on TI AM335X based boards (MII and RGMII modes). Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split pinmux into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* beagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3Peter Meerwald2012-09-01-0/+4
| | | | Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
* omap: am335x_evm: enable i2c1 channelSteve Sakoman2012-09-01-0/+14
| | | | | | | This patch sets up pinmux, enables fclk, and defines CONFIG_I2C_MULTI_BUS Signed-off-by: Steve Sakoman <steve@sakoman.com>
* beagle: removed unused pr_debug #definePeter Meerwald2012-09-01-2/+0
| | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
* beagle: make get_expansion_id(), get_board_revision(), beagle_display_init() ↵Peter Meerwald2012-09-01-3/+3
| | | | | | static Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
* da850/omap-l138: Fix NAND flash timingsLad, Prabhakar2012-09-01-5/+5
| | | | | | | | | | | | | | | Though Commit id a3f88293ddd13facd734769c1664d35ab4ed681f (da850evm: setup the NAND flash timings) has configured the AEMIF timings, they are not exactly in sync with the timings used in Linux. Linux is configuring the timing register as 0x08222204, where as currently it configured to 0x00100084 in U-Boot. This issue was found out when support for NAND SPL is added in U-Boot. Without this patch U-Boot does not come up with SPL. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVMRajashekhara, Sudhakar2012-09-01-1/+11
| | | | | | | | | | | | | AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When GP0[11] is low, the SD0 interface will not work, but NOR flash will. When GP0[11] is high, SD0 will work but NOR flash will not. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar2012-09-01-0/+32
| | | | | | | | | This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* omap: am335x_evm: remove unused definitionsSteve Sakoman2012-09-01-5/+0
| | | | | | | | | | UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN are defined inn evm.c but not used. Also removes unnecessary include of serial.h PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used. Signed-off-by: Steve Sakoman <steve@sakoman.com>
* OMAP3: mcx: read hot-water-button after resetStefano Babic2012-09-01-0/+23
| | | | | | | Detect hot-water-button to start a differnt image. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
* OMAP3: mcx: set pinmux for uart4Stefano Babic2012-09-01-3/+8
| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
* arm: omap3: cm-t35: minor comment and printf changeIgor Grinberg2012-09-01-2/+2
| | | | | | | Fix the comment to reflect the actual function call time. Change the printf message to look nicer in the context it might be printed. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* hawkboard/omapl-138: Add support for generating ais image for hawkboardSughosh Ganu2012-09-01-0/+4
| | | | | | | | | Parameters used for configuring certain SoC peripherals are parsed from the cfg file and appended as part of the ais image's header. The u-boot-spl.ais generated is flashed separately to the nand, so do not delete the file after generation of u-boot.ais. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* Consolidate bootcount code into drivers/bootcountStefan Roese2012-09-01-109/+0
| | | | | | | | | | | | | | | | | | | This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mpc52xx: remove o2dnt boardAnatolij Gustschin2012-09-01-821/+0
| | | | | | | Remove old o2dnt board without OF support. New support for this board is added by the previous patch, O2I configuration. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* mpc52xx: add common o2dnt and o2dnt2 support and configurationsAnatolij Gustschin2012-09-01-0/+434
| | | | | | | | Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* rename EB+MCF-EV123 to its current marketing name EB+CPU5282Jens Scharsig2012-08-09-0/+0
| | | | | | | | | * rename board directory to eb_cpu5282 * rename EB+MCF-EV123_.*config to eb_cpu5282_.*config * add Maintainer for EB+CPU5282 board * rename prompt Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* powerpc/sgmii: To support PHY link state auto detect in SGMII modeHongtao Jia2012-08-08-8/+49
| | | | | | | | | | | | | | | PHYs on SGMII riser card are used in SGMII mode with different external IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type under ethernet node should be updated. Otherwise the PHY interrupt can not be handled therefor PHY link state change can not be auto detected. For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed but it's still be kept to guarantee the sgmii mode could work with old device tree. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p2041: configure the CPLD lane_mux according to RCWShaohui Xie2012-08-08-0/+39
| | | | | | | | | | | | | | | | | | | Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg is 0xc, CPLD supports SATA by default, we should re-configure the lane muxing according to RCW, which indicates what SerDes protocol it is running. Default lane muxing map is as below: Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg; Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg; Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2 and bit 3 respectively. Default value of these bits for lane muxing is '1', we should set or clear these bits accoring to RCW. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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