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* powerpc/mpc85xxcds: Fix PCI speedchenhui zhao2011-10-03-12/+12
| | | | | | | | The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8548cds: Fix booting messagechenhui zhao2011-10-03-3/+3
| | | | | | Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
* powerpc/p2041rdb: remove watch dog related codesShaohui Xie2011-10-03-12/+1
| | | | | | | | | | CPLD 2.2 removed board watch dog support due to the limitation of CPLD capacity after adding all the requested features, such as switch overriding. There is no pin-compatible upgrade part available for current PCB design. So remove codes related to it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: updated description of cpld commandShaohui Xie2011-10-03-8/+8
| | | | | | | | According to CPLD 2.2, the default configuration is changed, so updated the description of CPLD command, otherwise it will confusing. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: add more ddr frequencies supportShaohui Xie2011-10-03-1/+4
| | | | | | | | | This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8SU-ACF). Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: set sysclk according to status of physical switch SW1Shaohui Xie2011-10-03-0/+17
| | | | | | | | | | | | | P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8], software need to read the SW1 status to decide what the sysclk needs. SW1[8~6] : frequency 0 0 1 : 83.3MHz 0 1 0 : 100MHz others: 66.667MHz Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: update cpld reset command according to CPLD 2.0Shaohui Xie2011-10-03-7/+11
| | | | | | | | | CPLD 2.0 provides a new register which bit[0] is set to '1' will reset board with initializing the CPLD registers to default values. And add bit[6] of register at offset 0x5 to use to enable flash bank selection. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driverYork Sun2011-09-29-11/+123
| | | | | | | | | | Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c. The unified driver can initialize data using DDR controller. No need to use DMA if just to initialze for ECC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Refactor P2041RDB to use common p_corenet filesKumar Gala2011-09-29-202/+13
| | | | | | | | | | | The P2041RDB has almost identical setup for TLB, LAWS, and PCI with other P-Series CoreNet platforms. The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the TLB and LAW setup tables. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: refactor common P-Series CoreNet files for FSL boardsKumar Gala2011-09-29-5/+42
| | | | | | | | | | | | | | | | We currently support 4 SoC/Boards from the P-Series of QorIQ SoCs that are based on the 'CoreNet' Architecture: P2041RDB, P3041DS, P4080DS, and P5020DS. There is a significant amount of commonality shared between these boards that we can refactor into common code: * Initial LAW setup * Initial TLB setup * PCI setup We start by moving the shared code between P3041DS, P4080DS, and P5020DS into a common directory to be shared with other P-Series CoreNet boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entriesKumar Gala2011-09-29-15/+19
| | | | | | | We shouldn't be setting execute permissions on TLB entries that will not actually have any code run from them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMMYork Sun2011-09-29-19/+84
| | | | | | | | | | | RDIMM has different timing parameters from UDIMM. Create new tables for RDIMMs. Single-, dual- and quad-rank RDIMMs have been verified with speeds from 800 to 1333MT/s. Speed table expands to include 1600MT/s for future use. Single- and quad-rank RDIMM entries are copied into UDIMM tables for future use. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: Move DDR RCW overriding to common codeYork Sun2011-09-29-14/+0
| | | | | | | | DDR RCW varies at different speeds. It is common for all platform. Move it out from corenet_ds. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Cleanup extern in corenet_ds board codeKumar Gala2011-09-29-2/+1
| | | | | | Move extern of pci_of_setup() into corenet_ds.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: Add ethernet support on P2041RDB boardMingkai Hu2011-09-29-0/+230
| | | | | | | | | | | | | | Add support for RGMII, SGMII and XAUI Ethernet on P2041RDB board. The five dTSEC can be routed to two on-board RGMII phy, three on-board SGMII phy or four SGMII phy on SGMII riser card according to different serdes protocol configuration and board lane configuration. Also updated the device tree to direct the Fmac MAC to the correct PHY. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add networking support to P1023RDSRoy Zang2011-09-29-0/+40
| | | | | | | | | | | | | | | | | The P1023 has two 1G ethernet controllers the first can run in SGMII, RGMII, or RMII. The second can only do SGMII & RGMII. We need to setup a for SoC & board registers based on our various configuration for ethernet to function properly on the board. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/hydra: Add ethernet support on P5020/P3041 DS boardsTimur Tabi2011-09-29-0/+555
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P3041DS & P5020DS ("Hydra"). The lane_to_slot[] array is initialized dynamically, since board switches can be used to control the muxing of SERDES lanes to slots. The BRDCFG1 PIXIS register is used to route the MII bus to the appropriate slot. The SERDES configuration is queried to help determine the routing between MACs and slot/phy combination. If a XAUI card is inserted, muxing for that card is enabled and never turned off. The PHY address for the 10G XAUI card depends on the slot in which it's inserted. If it's in slot 1, the address is 4. If it's in slot 2, the address is 0. Update the MDIO routing in the P3041DS and P5020DS device trees based on the board-level muxing. The SERDES configuration determines which SGMII/XGMII boards are located in which slots, and so the MDIO bus needs to be muxed correctly whenever talking to a PHY connected to any Fman MAC. The Fman Ethernet nodes in the device tree also need to be routed to the correct PHYs. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add FMan ethernet support to P4080DSAndy Fleming2011-09-29-4/+632
| | | | | | | | | | | | | | | | | | | | | | | Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P4080DS. The board supports add-on cards for SGMII and XAUI functionality. Which slots on the board these cards are in is a function of the SERDES option selected and muxes on the board. Additionally because of the high-configurablity which MDIO bus one is connected to is "selected" via an FPGA register. We create dummy MDIO bus for the phy layer and hide the mux manipulation in this dummy layer. Add fman fdt helper function in board common code it'll be used by several freescale boards that do various muxing of the MDIO signals based on which controller/interface one is trying to talk to. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8548cds: Cleanup mpc8548cds.cZhao Chenhui2011-09-29-7/+0
| | | | | | | Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entriesKumar Gala2011-09-29-15/+15
| | | | | | | We shouldn't be setting execute permissions on TLB entries that will not actually have any code run from them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add basic support for P1010RDBPoonam Aggrwal2011-09-29-0/+765
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boot methods supported: NOR Flash, SPI Flash and SDCARD This patch adds the following basic interfaces: DDR3, eTSEC, DUART, I2C, SD/MMC, USB, SATA, PCIe, NOR Flash, SPI Flash. P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) Local Bus (IFC): 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 64KB CPLD device(GPCM interface) SPI Flash: 128 Mbit SPI Flash memory SD/MMC: connector to interface with the SD memory card SATA: 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0: x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC: eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN: Two DB-9 female connectors for Field bus interface UART: supports two UARTs up to 115200 bps for console TDM: 2 FXS ports connected via an external SLIC to the TDM interface. SLIC: SPI SLIC I2C: Serial EEprom Real time clock 256 Kbit M24256 I2C EEPROM PCIe: PCIe and mPCIe connectors. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for new P102x/P2020 RDB style boardsLi Yang2011-09-29-0/+946
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following boards share a common design but with minor variations between them: P1020MSBG-PC P1020RDB-PC P1020UTM-PC P1021RDB-PC P1024RDB P1025RDB P2020RDB-PC The P1020RDB-PC shares its roots in the existing P1020RDB board design, however uses DDR3 instead of DDR2. P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK. Key features on these boards include: * DDR3 * NOR flash * NAND flash (on RDB's only) * SPI flash (on RDB's only) * SDHC/MMC card slot * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB) * PCIE slot and mini-PCIE slots As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM is used to store SPD data. In case of absent or corrupted SPD, falling back to timing data embedded in the source code will be used. Raw timing data is extracted from DDR chip datasheet. Different speeds of DDR are supported with this approach. ODT option is forced to fit this set of boards, again because they don't have regular DIMMs. CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification for writing timing. VSC firmware Address is defined by default in config file for eTSEC1. SD width is based off DIP switch. DIP switch is detected on the board by reading i2c bus and setting the appropriate mux values. Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have pins multiplexing. QE function needs to be disabled to access Nor Flash and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe" in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below 'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD. 'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Zhao Chenhui <b26998@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: ramneek.mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Akhil Goyal <akhil.goyal@freescale.com>
* ARM: versatile: delete split_by_variant.shLinus Walleij2011-09-28-42/+0
| | | | | | | | | Since commit d388298a59ba375c76597b8f95b560afa971a0fb by Stefano Babic this file is no longer needed so delete it. Cc: Stefano Babic <sbabic@denx.de> Cc: Loïc Minier <loic.minier@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: remove broken "ixdp425" and "ixpdg425" boardsAlbert ARIBAUD2011-09-27-288/+0
| | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Stefan Roese <sr@denx.de>
* OMAP3: beagle: Fix build warning in beagle.cDirk Behme2011-09-22-1/+1
| | | | | | | | | | | | | | Fix build warning beagle.c:532: warning: initialization from incompatible pointer type Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: Jason Kridner <jkridner@beagleboard.org> CC: Koen Kooi <koen@dominion.thruhere.net> CC: Joel A Fernandes <agnel.joel@gmail.com> Cc: Greg Turner <gregturner@ti.com> CC: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Jason Kridner <jkridner@beagleboard.org>
* km/common: fix bug in IVM mac address accessHolger Brunck2011-09-21-2/+2
| | | | | | | | The MAC address stored in the inventory eeprom begins at offset 1. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Wolfgang Denk <wd@denx.de>
* led: remove camel casing of led identifiers globallyJason Kridner2011-09-13-46/+46
| | | | | | | | | | | | | | | Result of running the following command to address Wolfgang's comment about camel case: for file in `find . | grep '\.[chS]$'`; do perl -i -pe 's/(green|yellow|red|blue)_LED_(on|off)/$1_led_$2/g' $file; done Discussion: http://patchwork.ozlabs.org/patch/84988/ Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: fix pad configuration settings for SDP and PandaAneesh V2011-09-13-28/+22
| | | | | | | | | omap4: fix pad configuration settings for SDP and Panda Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: David Anders <x0132446@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: Adapt board files to use generic APISanjeev Premi2011-09-13-112/+112
| | | | | | | This patch contains updates the sources in the board files to use the generic API. Signed-off-by: Sanjeev Premi <premi@ti.com>
* MX25: tx25: Fix build by making use of GPIO frameworkFabio Estevam2011-09-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | Make use of GPIO framework and avoid the following build error: tx25.c: In function 'tx25_fec_init': tx25.c:73: error: dereferencing pointer to incomplete type tx25.c:74: error: dereferencing pointer to incomplete type tx25.c:75: error: dereferencing pointer to incomplete type tx25.c:76: error: dereferencing pointer to incomplete type tx25.c:83: error: dereferencing pointer to incomplete type tx25.c:84: error: dereferencing pointer to incomplete type tx25.c:114: error: dereferencing pointer to incomplete type tx25.c:115: error: dereferencing pointer to incomplete type tx25.c:116: error: dereferencing pointer to incomplete type tx25.c:117: error: dereferencing pointer to incomplete type tx25.c:124: error: dereferencing pointer to incomplete type tx25.c:125: error: dereferencing pointer to incomplete type tx25.c:126: error: dereferencing pointer to incomplete type Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: hawkboard: fix compilation of nand_splWolfgang Denk2011-09-10-0/+1
| | | | | | | | | | | | | Fix build problem: nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c: In function 'board_init_f': nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c:132: warning: implicit declaration of function 'nand_boot' nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c:133: warning: 'noreturn' function does return Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* cm4008, cm41xx: fix build warningsWolfgang Denk2011-09-10-0/+2
| | | | | | | | | | | | | | Fix these: cm4008.c: In function 'board_eth_init': cm4008.c:79: warning: implicit declaration of function 'ks8695_eth_initialize' cm41xx.c: In function 'board_eth_init': cm41xx.c:79: warning: implicit declaration of function 'ks8695_eth_initialize' While we are at it, sort include list in netdev.h Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Greg Ungerer <greg.ungerer@opengear.com>
* KS8695: convert KS8695 eth driver to CONFIG_MULTI_ETHGreg Ungerer2011-09-10-0/+8
| | | | | | | Trivial conversion of the ks8695eth driver to a CONFIG_MULTI_ETH type driver. Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* CM41xx: fix signedness of env bootargs string pointerGreg Ungerer2011-09-10-2/+2
| | | | | | | | | | The pointer to the flash based bootargs should be a "char *", not unsigned. Fixes: cm41xx.c: In function ‘env_flash_cmdline’: cm41xx.c:67: warning: pointer targets in passing argument 2 of ‘setenv’ differ in signedness Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* CM4008: fix signedness of env bootargs string pointerGreg Ungerer2011-09-10-2/+2
| | | | | | | | | | The pointer to the flash based bootargs should be a "char *", not unsigned. Fixes: cm4008.c: In function ‘env_flash_cmdline’: cm4008.c:67: warning: pointer targets in passing argument 2 of ‘setenv’ differ in signedness Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-09-10-15/+13
|\ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hose powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hose
| * powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hoseZhao Chenhui2011-09-09-6/+5
| | | | | | | | | | | | | | | | The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hoseZhao Chenhui2011-09-09-3/+3
| | | | | | | | | | | | | | | | The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hoseZhao Chenhui2011-09-09-6/+5
| | | | | | | | | | | | | | | | The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | CM4000: fix broken flash base for OpenGear boardsGreg Ungerer2011-09-10-2/+2
|/ | | | | | | | | | | | | | | | Use _bss_start_ofs as the size of the boot loader code+data that we want to protect in the flash. This replaces use of the no longer defined _armboot_start. Fixes: flash.c: In function ‘flash_init’: flash.c:75: error: ‘_bss_start’ undeclared (first use in this function) flash.c:75: error: (Each undeclared identifier is reported only once flash.c:75: error: for each function it appears in.) flash.c:75: error: ‘_armboot_start’ undeclared (first use in this function) Signed-off-by: <greg.ungerer@opengear.com>
* arm: tegra2: fix out-of-tree buildChe-liang Chiou2011-09-07-0/+8
| | | | | | | | | | | | | | | The out-of-tree build fails because the Makefiles in question depend on source files of another directory but do not explicitly mkdir that directory. As a matter of fact, other Makefiles under board/*/ directory that refer to source files under another directory explicitly call mkdir. This patch adds explicit mkdir's to the Makefiles in question, and verifies that out-of-tree build is working. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* da8xxevm: Fix warning: unused variable 'val'Wolfgang Denk2011-09-07-1/+3
| | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
* ARM: PXA: remove broken "zylonite" board.Wolfgang Denk2011-09-07-1504/+0
| | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marek Vasut <marek.vasut@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* ARM: remove broken "shannon" board.Wolfgang Denk2011-09-07-740/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Rolf Offermanns <rof@sysgo.de>
* ARM: remove broken "modnet50" board.Wolfgang Denk2011-09-07-871/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Thomas Elste <info@elste.org>
* ARM: remove broken "lpc2292sodimm" board.Wolfgang Denk2011-09-07-477/+0
| | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ARM: remove broken "lart" board.Wolfgang Denk2011-09-07-897/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Alex Züpke <azu@sysgo.de>
* ARM: remove broken "impa7" board.Wolfgang Denk2011-09-07-594/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marius Gröger <mag@sysgo.de>
* ARM: remove broken "gcplus" board.Wolfgang Denk2011-09-07-663/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: George G. Davis <gdavis@mvista.com>
* ARM: remove broken "evb4510" board.Wolfgang Denk2011-09-07-838/+0
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Curt Brune <curt@cucy.com>
generated by cgit v1.1 at 2024-11-20 08:00:45 +0000