| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
| |
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
|
|
| |
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
|
|
|
|
|
|
| |
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
|
|
|
|
|
|
|
|
| |
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|\ |
|
| |
| |
| |
| |
| |
| | |
Handles machine specific functions by using weak functions.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
|
| |
| |
| |
| |
| |
| | |
Move things to appropriate place.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
|
| |
| |
| |
| | |
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
| |
| |
| |
| | |
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
| |
| |
| |
| | |
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|/
|
|
| |
Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
and so on).
The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.
The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
|
|
|
|
|
|
|
| |
Backlight was switched on even when temperature was too low.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
|
|
|
|
|
| |
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
|
|
|
|
|
|
|
|
|
|
|
| |
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| | |
The parallel flash on the BF537-STAMP is CFI compliant, so there is no need
for the board specific driver at all. Just use the common CFI driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
| |
| |
| |
| |
| |
| |
| |
| | |
Stop tying things to the processor that should be tied to other defines and
change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
system to select the -mcpu option.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
| |
| |
| |
| |
| |
| |
| |
| | |
This moves the Blackfin-common bootldr command out of the BF537-STAMP
specific board directory and into the common directory so that all Blackfin
boards may utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
| |
| |
| |
| | |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| |
| |
| |
| | |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| |
| |
| |
| |
| |
| |
| | |
This patch adds USB OHCI support to the Canyonlands board port. It also
enables EXT2 support.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.
This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.
Tested with 512 byte page NAND device (32MByte) on Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| |
| |
| |
| | |
This patch adds support for the AMCC Canyonlands 460EX evaluation
board.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| |
| |
| |
| |
| | |
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| | |
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
|
| |
| |
| |
| | |
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
|
| |
| |
| |
| |
| |
| |
| | |
Cleanup: Remove custom flash driver for 8 bit boot-eprom and replace it with
the FLASH_CFI_LEGACY et al. config options.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
|
|/
|
|
| |
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
| |
This board never used a MGT5100 processor.
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
| |
pointer target type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| | |
The taihu board used gpio_read_out_bit which reads the output register and not
the pin state.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
|
| |
| |
| |
| |
| |
| | |
initialize the UPIOx controller.
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|/
|
|
|
|
|
| |
add support for the config Flash.
initialize the UPIOx controller.
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Many of the spd.h #includers don't need it,
and wanted to have spd_sdram() declared instead.
Since they didn't get that, some also had open
coded extern declarations of it instead or as well.
Fix it all up by using spd_sdram.h where needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
|/
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|\ |
|
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Adds PCI support for MPC5121
Tested with drivers/net/rtl8139.c
Support is conditional since PCI on old silicon does not work.
ads5121_PCI_config turns on PCI
In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: John Rigby <jrigby@freescale.com>
|
|\ \ |
|
| |/
| |
| |
| |
| |
| |
| |
| |
| | |
Back in commit a551cee99ad1d1da20fd23ad265de47448852f56
(86xx: Fix GUR PCI config registers properly), we should have
changed the MPC86xx_PORBMSR_HA and MPC86xx_PORDEVSR_IO_SEL
symbols in the sbc8641d board as well. Fix this oversight.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|