| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
| |
Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
| |
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
| |
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
|
|
|
|
| |
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
| |
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
| |
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
|
|
| |
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
| |
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
|
|
|
|
|
|
|
| |
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
|
|
|
|
|
|
|
| |
This allows a watchdog reset to start the ROM's
usb downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
|
|
|
|
|
|
|
| |
Move mx6 specific defines to arch-mx6 directory.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
| |
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Instead of manipulating gpio registers directly, use the calls
from the gpio library.
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
| |
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
|
|
|
|
|
|
|
| |
This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
| |
The patch adds the memory initialization sequence of DDR3.
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
| |
Add new clock values for Exynos5250 Rev 1.0
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Default spl/u-boot-spl.lds created by spl/Makefile resolves
the spl text load addr to 0x0. As 0x0 belongs to iROM addr so
Global variables can not be used.
Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables
in spl.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Define table-driven configuration mechanism for SMDK5250
rather than hard-coding board initialization parameters.
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
|
|
|
|
|
|
|
|
| |
Don't use timer_init from tegra board.c. This comes out of arm720t
for the SPL build.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Change the mkdir commands for the object directories to be
unconditional. This fixes an issue when building for SPL where
SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
|
|
|
|
|
|
|
|
| |
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM,
contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors.
For more details, see http://www.raspberrypi.org/.
Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack
relocation to top of RAM) extracted from work by:
Oleksandr Tymoshenko <gonzo@bluezbox.com>.
GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
|
|
| |
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
|
| |
Register mapping has changed on power control chip between
the first and second revision.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
|
|
| |
Functions such as providing power to the MMC device and reading
the processor version register should be in the cpu area for
access by multiple u8500-based boards.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
| |
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
|
|
|
|
|
|
|
| |
Enabling timers and clocks in PRCMU and cleaning up mailbox.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
|
|
|
|
|
|
|
|
| |
This is to allow the prcmu functions to be used by multiple
u8500-based processors.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
| |
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:
drivers/gpio/Makefile
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
change the behaviour of switch initialization:
- rename "pwl" to "lan" in hwconfig parameter
"lan" = port 1 with phy addr 2
"lmn" = port 2 with phy addr 3
- if we have a valid switch config file in flash, do not
evaluate the settings in the hwconfig "lan" or "lmn"
subcommand.
- if we have no valid switch config file in flash, start
the switch with default values, if we have a "lan" or
a "lmn" hwconfig subcommand. If no "lan" or "lmn" is
found in hwconfig, do nothing with the switch.
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
|
|
|
|
|
|
| |
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
|
|
|
|
| |
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
| |
MMC1 is available in profile 2 on the GP EVM and is exposed on the
expansion header on beaglebone.
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
|
| |
The AM335x GP EVM can have one of 8 different profiles selected. Each
profile has a different set of peripherals and requires different pinmux
configurations that conflict with other profiles. i2c1 is an example of
a conflicted mux currently.
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
| |
Fix build failure due the move of mx28 code to 'mxs' SoC.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
| |
This i.MX28 platform supports the following:
* 2x FEC ethernet
* USB on USBH0
* I2C EEPROM
* SPI NVRAM
* LEDs
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
|
|
|
|
|
|
| |
This gets us rid of duplication of the same file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
| |
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
|
|
|
| |
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
|
|
|
|
|
| |
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
| |
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
|
|
|
|
| |
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
|
|
|
|
|
|
|
|
|
|
| |
This adds support for Bluegiga APX4 Development Kit. It is built around
Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC,
RTC and USB. APX4 has only one ethernet port.
Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
| |
This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.
Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add at91sam9x5ek board support, this board support the following SoCs
AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35
Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
|
|
|
|
|
|
|
|
| |
The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the
LPDDR memory consist on two dies of 256MiB.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
|
|
|
|
|
|
|
|
|
|
| |
- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
- Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.
Signed-off-by: Tom Rini <trini@ti.com>
|