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* mpc8xx: remove RPXlite_dw, quantum board supportMasahiro Yamada2014-07-07-1720/+0
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove qs850, qs860t board supportMasahiro Yamada2014-07-07-2316/+0
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* vcma9/lowlevel_init.S: trivial: terminate commentJeroen Hofstee2014-07-07-1/+1
| | | | Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* am43xx: Tune the system to avoid DSS underflowsCooper Jr., Franklin2014-07-07-6/+62
| | | | | * This is done by limiting the ARM's bandwidth and setting DSS priority in the EMIF controller to ensure underflows do not occur.
* am43xx: Update EMIF DDR3 Configuration for AM43x GPFranklin S. Cooper Jr2014-07-07-0/+112
| | | | | | | | | * Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* board: ti: dra7xx: add mux data for UART3Felipe Balbi2014-07-07-0/+5
| | | | | | | | | | | | | J6 EVM can be built with UART3 as console, but currently there's nothing muxing UART3 correctly. Likely this only works because, based on commit log, author was only testing with UART3 boot and - I assume - ROM code leave UART3 correctly muxed in that case. If we want to boot from MMC and still use UART3 as console, then we need to mux those signals correctly. Signed-off-by: Felipe Balbi <balbi@ti.com>
* socfpga: Relocate arch common functions away from boardChin Liang See2014-07-05-23/+0
| | | | | | | | | | | | | To move the arch common function away from board folder to arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication for other non Altera dev kit which is using socfpga device. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Detlev Zundel <dzu@denx.de>
* socfpga: Adding Scan Manager driverChin Liang See2014-07-05-0/+674
| | | | | | | | | | | | Scan Manager driver will be called to configure the IOCSR scan chain. This configuration will setup the IO buffer settings Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* arm: ep9315: Return back Cirrus Logic EDB9315A board supportSergey Kostanbaev2014-07-04-0/+508
| | | | | | | This patch returns back support for old ep93xx processors family Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board supportYork Sun2014-07-04-0/+356
| | | | | | | | | | | | | | | | LS2085A is an ARMv8 implementation. This adds board support for emulator and simulator: Two DDR controllers UART2 is used as the console IFC timing is tightened for speedy booting Support DDR3 and DDR4 as separated targets Management Complex (MC) is enabled Support for GIC 500 (based on GICv3 arch) Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
* arm: Add support for semihosting for armv8 fastmodel targets.Darwin Rambo2014-07-03-5/+96
| | | | | | | | | | | | | | | | | | | | | | The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF images and u-boot, and does this for virtual platforms by using semihosting. This commit extends this idea by allowing u-boot to also use semihosting to load the kernel/ramdisk/dtb. This eliminates the need for a bootwrapper and produces a more realistic boot sequence with virtual models. Though the semihosting code is quite generic, support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. Please refer to doc/README.semihosting for a more detailed description of semihosting and how it is used with the armv8 virtual platforms. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Cc: trini@ti.com Cc: fenghua@phytium.com.cn Cc: bhupesh.sharma@freescale.com
* Merge remote-tracking branch 'u-boot-samsung/master'Albert ARIBAUD2014-07-01-2/+2
|\ | | | | | | | | | | | | | | Conflicts: boards.cfg Conflict was trivial between goni maintainer change and lager_nor removal.
| * trats/trats2: exynos_power_init: return 0 if no battery detected.Przemyslaw Marczak2014-06-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic board support is now enabled for Exynos 4, and if any init function returns an error then the init process is stopped. This makes a boot issue on the Trats and Trats2 devices. If the device is supplied by USB cable or an external power supply then it can't boot because function exynos_power_init returns an error. Now this function returns 0 if battery is not connected. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-01-23/+118
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| * | omap3: overo: Select fdtfile for expansion boardAsh Charles2014-06-19-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The u-boot Overo board actually supports both Overo (OMAP35xx) and Overo Storm (AM/DM37xx) COMs with a range of different expansion boards. This provides a mechanism to select the an appropriate device tree file based on the processor version and, if available, the expansion board ID written on the expansion board EEPROM. To match the 3.15+ kernels, fdtfile names have this format: "omap3-overo[-storm]-<expansion board name>.dtb" By default, we use "omap3-overo-storm-tobi.dtb". Signed-off-by: Ash Charles <ashcharles@gmail.com> Conflicts: include/configs/omap3_overo.h
| * | board: ti: am43xx: enable QSPI and Gbit Ethernet on AM437x SKFelipe Balbi2014-06-19-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | AM437x Starter Kit has a qspi flash and gbit ethernet support. By muxing those signals, we can use those interfaces from u-boot. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | board: ti: am43xx: add AM437x SK PHY AddressFelipe Balbi2014-06-19-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | pass correct PHY Address when running on SK so that we have working ethernet with this board too. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | board: ti: am43xx: add support for AM43xx Starter KitFelipe Balbi2014-06-19-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM43xx Starter Kit is a new board based on AM437x line of SoCs. Being a low-cost EVM and small size EVM are intended to provide an entry level development platform on a full fledged Hardware System. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | board: ti: am43xx: print unsupported board nameFelipe Balbi2014-06-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | when porting u-boot to a new am43xx board, it helps to know the name of the current unsupported board so we don't have to hunt for design documents to figure out what's written in the EEPROM. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.cKhoronzhuk, Ivan2014-06-19-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | mtd: nand: davinci: add header file for driver definitionsKhoronzhuk, Ivan2014-06-19-17/+14
| |/ | | | | | | | | | | | | | | | | | | | | The definitions inside emif_defs.h concern davinci nand driver and should be in it's header. So create header file for davinci nand driver and move definitions from emif_defs.h and nand_defs.h to it. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [trini: Fixup more davinci breakage] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-30-330/+1134
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| * | mx28evk: Add documentation on how to boot from SPI NORFabio Estevam2014-06-17-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Explain the necessary steps in order to boot from SPI NOR. Based on a earlier submission from Mårten Wikman. Signed-off-by: Mårten Wikman <marten.wikman@novia.fi> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | imx: ventana: switch to SPLTim Harvey2014-06-06-51/+486
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to an SPL image. The SPL for Ventana does the following: - setup i2c and read the factory programmed EEPROM to obtain DRAM config and model for board-specific calibration data - configure DRAM per CPU/size/layout/devices/calibration - load u-boot.img from NAND and jump to it This allows for a single SPL+u-boot.img to replace the previous multiple boa configurations. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: auto-configure for IMX6Q vs IMX6DLTim Harvey2014-06-06-186/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use the new iomux function and a macros to create a multi-dimensional array of iomux values without duplicating the defintions. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: split read_eeprom into standalone fileTim Harvey2014-06-06-89/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the read_eeprom function out so that it can be shared (ie with SPL) Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | spl: consolidate arch/arm/include/asm/arch-*/spl.hMasahiro Yamada2014-06-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/include/asm/spl.h requires all SoCs to have arch/arm/include/asm/arch-*/spl.h. But many of them just define BOOT_DEVICE_* macros. Those macros are used in the "switch (boot_device) { ... }" statement in common/spl/spl.c. So they should not be archtecture specific, but be described as a simpile enumeration. This commit merges most of arch/arm/include/asm/arch-*/spl.h into arch/arm/include/asm/spl.h. With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h will be merged, while I am not sure about OMAP and Exynos. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> CC: Stefano Babic <sbabic@denx.de> CC: Minkyu Kang <mk7.kang@samsung.com> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bo Shen <voice.shen@atmel.com> [on sama5d3xek board for at91 part] Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stefano Babic <sbabic@denx.de> [applying Tim's i.MX6 patches] Acked-by: Tom Rini <trini@ti.com>
| * | mx6sabred: Add PFUZE100 PMIC supportFabio Estevam2014-05-28-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6sabreauto: Add the mx6dual-lite variantFabio Estevam2014-05-28-0/+130
| | | | | | | | | | | | | | | | | | Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-25-5999/+263
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| * | Remove nios-32 arch remnantsVasili Galka2014-06-19-335/+0
| | | | | | | | | | | | | | | | | | | | | | | | nios-32 arch was removed back in 2010 (1117cbf). Code depending on its headers (nios.h, nios-io.h) can't possibly compile since then. As it wasn't fixed till now it is safe to remove. Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | includes: move openssl headers to include/u-bootJeroen Hofstee2014-06-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 18b06652cd "tools: include u-boot version of sha256.h" unconditionally forced the sha256.h from u-boot to be used for tools instead of the host version. This is fragile though as it will also include the host version. Therefore move it to include/u-boot to join u-boot/md5.h etc which were renamed for the same reason. cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | freescale: m5253demo: fix unused-but-set-variable warningsMasahiro Yamada2014-06-19-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning messages: In function 'flash_erase': 180:21: warning: variable 'last' set but not used [-Wunused-but-set-variable] In function 'write_buff': 322:10: warning: variable 'port_width' set but not used [-Wunused-but-set-variable] Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
| * | Fix bug in io64 target (introduced by commit aba27ac)Vasili Galka2014-06-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From comparison of current logic and the logic that was prior to commit aba27ac, we see that first parameter of FPGA_GET_REG() shall be the FPGA index and not channel number. The re-factoring in commit aba27ac accidentally changed that. Cc: Stefan Roese <sr@denx.de> Acked-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | board:keymile: remove unnecessary double bracesJeroen Hofstee2014-06-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang interpretes an if condition like "if ((a = b) == NULL) as it tries to assign a value in a statement. Hence if you do "if ((something)) it warns you that you might be confused. Hence drop the double braces for plane if statements. cc: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | imximage_hynix.cfg: fix unterminated commentJeroen Hofstee2014-06-11-1/+1
| | | | | | | | | | | | | | | cc: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | cosmetic: board: pm9263 rewrite old style stuct initJeroen Hofstee2014-06-11-14/+14
| | | | | | | | | | | | | | | | | | | | | this prevent some warnings when compiling with clang cc: Stelian Pop <stelian@popies.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | cosmetic: Whitespace fixVasili Galka2014-06-11-2/+2
| | | | | | | | | | | | Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | cosmetic: atmel: replace old style struct initJeroen Hofstee2014-06-11-70/+70
| | | | | | | | | | | | | | | | | | This prevents some warnings when building with clang. cc:: andreas.devel@googlemail.com Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | m68k: Fix warnings with gcc 4.6Simon Glass2014-06-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Check run_command() return code properlyThomas Betker2014-06-11-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | run_command() returns 0 for success, 1 for failure. Fix places which assume that failure is indicated by a negative return code. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
| * | mx31ads: Fix the U-Boot binary outputSimon Glass2014-06-11-1/+3
| | | | | | | | | | | | | | | | | | | | | Correct the binary output so that image_binary_size is really at the end of the image. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | cm_t335: Fix the U-Boot binary outputSimon Glass2014-06-11-2/+2
| | | | | | | | | | | | | | | | | | | | | Correct the binary output so that image_binary_size is really at the end of the image. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | ti: am335x: Fix the U-Boot binary outputSimon Glass2014-06-11-1/+2
| | | | | | | | | | | | | | | | | | | | | This should include the hash so that image_binary_size is really at the end of the image, and not some 300 bytes earlier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-06-08-396/+313
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| * \ \ Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-28/+87
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| | * | | powerpc/B4420: Fixed incomplete handling for 0x9d serdes2poonam aggrwal2014-06-05-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Crossbars and IDT were not getting configured for Serdes2 protocol 0x9d for B4420. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | powerpc/t4rdb: Add alternate serdes protocols to align with A-007186Chunhe Lan2014-06-05-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols only using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. Alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | board/t2080qds: some update for ddrShengzhou Liu2014-06-05-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add support for 2nd DIMM slot. - make it work with DIMM which is less than 2GB. Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | powerpc/t4qds: Add alternate serdes protocols to align with A-007186Shaohui Xie2014-06-05-2/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. Only the protocols using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-29 09:23:46 +0000